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arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent

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In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.

Fixes: 7f7e5c1b03 ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240210-topic-1v-v1-6-fda0db38e29b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio 2024-02-12 14:10:14 +01:00 committed by Bjorn Andersson
parent d18b5477dc
commit 6e4f7e5399
1 changed files with 1 additions and 0 deletions
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arch/arm64/boot/dts/qcom/sm8550.dtsi
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@ -3245,6 +3245,7 @@ usb_1_dwc3: usb@a600000 {
snps,usb2-lpm-disable;
snps,has-lpm-erratum;
tx-fifo-resize;
dma-coherent;
ports {
#address-cells = <1>;