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net: stmmac: dwmac4: Fix MTL_OP_MODE_RTC mask and shift macros
RTC fields are located in bits [1:0]. Correct the _MASK and _SHIFT macros to use the appropriate mask and shift. Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20241107063637.2122726-2-leyfoon.tan@starfivetech.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -393,8 +393,8 @@ static inline u32 mtl_chanx_base_addr(const struct dwmac4_addrs *addrs,
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#define MTL_OP_MODE_EHFC BIT(7)
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#define MTL_OP_MODE_RTC_MASK 0x18
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#define MTL_OP_MODE_RTC_SHIFT 3
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#define MTL_OP_MODE_RTC_MASK GENMASK(1, 0)
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#define MTL_OP_MODE_RTC_SHIFT 0
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#define MTL_OP_MODE_RTC_32 (1 << MTL_OP_MODE_RTC_SHIFT)
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#define MTL_OP_MODE_RTC_64 0
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