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mmc: fix typos in comments

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Fix typos in comments, reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt.  Only touches comments, no code
changes.

Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
This commit is contained in:
Hemanth Selam 2026-09-07 12:16:32 +05:30 committed by Ulf Hansson
parent 155f6759c2
commit 6d05845f5c
12 changed files with 12 additions and 12 deletions
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2
drivers/memstick/core/ms_block.c
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@ -720,7 +720,7 @@ static int h_msb_parallel_switch(struct memstick_dev *card,
static int msb_switch_to_parallel(struct msb_data *msb);
/* Reset the card, to guard against hw errors beeing treated as bad blocks */
/* Reset the card, to guard against hw errors being treated as bad blocks */
static int msb_reset(struct msb_data *msb, bool full)
{

2
drivers/memstick/host/r592.c
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@ -289,7 +289,7 @@ static int r592_transfer_fifo_dma(struct r592_device *dev)
dev->dma_error = 0;
reinit_completion(&dev->dma_done);
/* TODO: hidden assumption about nenth beeing always 1 */
/* TODO: hidden assumption about nenth being always 1 */
sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
DMA_TO_DEVICE : DMA_FROM_DEVICE);

2
drivers/mmc/core/block.c
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@ -86,7 +86,7 @@ MODULE_ALIAS("mmc:block");
static DEFINE_MUTEX(block_mutex);
/*
* The defaults come from config options but can be overriden by module
* The defaults come from config options but can be overridden by module
* or bootarg options.
*/
static int perdev_minors = CONFIG_MMC_BLOCK_MINORS;

2
drivers/mmc/core/core.c
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@ -2004,7 +2004,7 @@ unsigned int mmc_calc_max_discard(struct mmc_card *card)
/*
* Without erase_group_def set, MMC erase timeout depends on clock
* frequence which can change. In that case, the best choice is
* frequency which can change. In that case, the best choice is
* just the preferred erase size.
*/
if (mmc_card_mmc(card) && !(card->ext_csd.erase_group_def & 1))

2
drivers/mmc/core/mmc.c
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@ -1015,7 +1015,7 @@ static void mmc_set_bus_speed(struct mmc_card *card)
}
/*
* Select the bus width amoung 4-bit and 8-bit(SDR).
* Select the bus width among 4-bit and 8-bit(SDR).
* If the bus width is changed successfully, return the selected width value.
* Zero is returned instead of error value if the wide width is not supported.
*/

2
drivers/mmc/host/bcm2835.c
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@ -1095,7 +1095,7 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
int div;
/* The SDCDIV register has 11 bits, and holds (div - 2). But
* in data mode the max is 50MHz wihout a minimum, and only
* in data mode the max is 50MHz without a minimum, and only
* the bottom 3 bits are used. Since the switch over is
* automatic (unless we have marked the card as slow...),
* chosen values have to make sense in both modes. Ident mode

2
drivers/mmc/host/dw_mmc.h
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@ -69,7 +69,7 @@ struct dw_mci_dma_slave {
* @cmd: The command currently being sent to the card, or NULL.
* @data: The data currently being transferred, or NULL if no data
* transfer is in progress.
* @stop_abort: The command currently prepared for stoping transfer.
* @stop_abort: The command currently prepared for stopping transfer.
* @prev_blksz: The former transfer blksz record.
* @timing: Record of current ios timing.
* @use_dma: Which DMA channel is in use for the current transfer, zero

2
drivers/mmc/host/mvsdio.c
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@ -717,7 +717,7 @@ static int mvsd_probe(struct platform_device *pdev)
/*
* Some non-DT platforms do not pass a clock, and the clock
* frequency is passed through platform_data. On DT platforms,
* a clock must always be passed, even if there is no gatable
* a clock must always be passed, even if there is no gateable
* clock associated to the SDIO interface (it can simply be a
* fixed rate clock).
*/

2
drivers/mmc/host/sdhci-msm.c
View File

@ -1770,7 +1770,7 @@ static void sdhci_msm_handle_pwr_irq(struct sdhci_host *host, int irq)
/*
* The driver has to acknowledge the interrupt, switch voltages and
* report back if it succeded or not to this register. The voltage
* report back if it succeeded or not to this register. The voltage
* switches are handled by the sdhci core, so just report success.
*/
msm_host_writel(msm_host, irq_ack, host,

2
drivers/mmc/host/sdhci-of-esdhc.c
View File

@ -1381,7 +1381,7 @@ static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host)
if (!IS_ERR(clk)) {
/*
* esdhc->peripheral_clock would be assigned with a value
* which is eSDHC base clock when use periperal clock.
* which is eSDHC base clock when use peripheral clock.
* For some platforms, the clock value got by common clk
* API is peripheral clock while the eSDHC base clock is
* 1/2 peripheral clock.

2
drivers/mmc/host/sdhci-omap.c
View File

@ -332,7 +332,7 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode)
u32 reg;
int i;
/* clock tuning is not needed for upto 52MHz */
/* clock tuning is not needed for up to 52MHz */
if (ios->clock <= 52000000)
return 0;

2
drivers/mmc/host/sdhci.h
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@ -409,7 +409,7 @@ struct sdhci_adma2_64_desc {
#define SDHCI_MAX_MRQS 2
/*
* 48bit command and 136 bit response in 100KHz clock could take upto 2.48ms.
* 48bit command and 136 bit response in 100KHz clock could take up to 2.48ms.
* However since the start time of the command, the time between
* command and response, and the time between response and start of data is
* not known, set the command transfer time to 10ms.