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ARM: DT: Hisilicon ARM32 SoCs updates for v5.9

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- Update L2 cache controller nodes to fix dtschema validator warnings
   for hi3620 and hix5hd2
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Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM: DT: Hisilicon ARM32 SoCs updates for v5.9

- Update L2 cache controller nodes to fix dtschema validator warnings
  for hi3620 and hix5hd2

* tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-22 21:51:57 +02:00
commit 6ce448eeef
2 changed files with 2 additions and 2 deletions
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2
arch/arm/boot/dts/hi3620.dtsi
View File

@ -71,7 +71,7 @@ amba {
interrupt-parent = <&gic>;
ranges = <0 0xfc000000 0x2000000>;
L2: l2-cache {
L2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0x100000 0x100000>;
interrupts = <0 15 4>;

2
arch/arm/boot/dts/hisi-x5hd2.dtsi
View File

@ -381,7 +381,7 @@ local_timer@a00600 {
interrupts = <1 13 0xf01>;
};
l2: l2-cache {
l2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0x00a10000 0x100000>;
interrupts = <0 15 4>;