mirror of
https://github.com/torvalds/linux.git
synced 2026-06-04 04:23:35 +02:00
drm/xe: Add PR_CTR_CTRL/THRSH register definitions
The Watchdog Counter Control and Watchdog Counter Threshold registers are needed for watchdog programming. This watchdog will generate the "Media Hang Notify" interrupt. Bspec: 45999, 46000 Bspec: 60373, 60374 Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> Link: https://patch.msgid.link/20260303201354.17948-2-michal.wajdeczko@intel.com
This commit is contained in:
parent
4f53d8c6d2
commit
6cd7d168c4
|
|
@ -132,6 +132,14 @@
|
|||
#define RING_BBADDR(base) XE_REG((base) + 0x140)
|
||||
#define RING_BBADDR_UDW(base) XE_REG((base) + 0x168)
|
||||
|
||||
#define PR_CTR_CTRL(base) XE_REG((base) + 0x178)
|
||||
#define CTR_COUNT_SELECT_FF REG_BIT(31)
|
||||
#define CTR_LOGIC_OP_MASK REG_GENMASK(30, 0)
|
||||
#define CTR_START 0
|
||||
#define CTR_STOP 1
|
||||
#define CTR_LOGIC_OP(OP) REG_FIELD_PREP(CTR_LOGIC_OP_MASK, CTR_##OP)
|
||||
#define PR_CTR_THRSH(base) XE_REG((base) + 0x17c)
|
||||
|
||||
#define BCS_SWCTRL(base) XE_REG((base) + 0x200, XE_REG_OPTION_MASKED)
|
||||
#define BCS_SWCTRL_DISABLE_256B REG_BIT(2)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user