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arm64: dts: ti: k3-am64: Remove PCIe endpoint node

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This node is an example node for the PCIe controller in "endpoint" mode.
By default the controller is in "root complex" mode and there is already a
DT node for the same.

Examples should go in the bindings or other documentation.

Remove this node.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240124183659.149119-4-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Andrew Davis 2024-01-24 12:36:59 -06:00 committed by Vignesh Raghavendra
parent e074d9d9a5
commit 6cce605507
2 changed files with 0 additions and 25 deletions
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19
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
View File

@ -1041,25 +1041,6 @@ pcie0_rc: pcie@f102000 {
status = "disabled";
};
pcie0_ep: pcie-ep@f102000 {
compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
reg = <0x00 0x0f102000 0x00 0x1000>,
<0x00 0x0f100000 0x00 0x400>,
<0x00 0x0d000000 0x00 0x00800000>,
<0x00 0x68000000 0x00 0x08000000>;
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
max-link-speed = <2>;
num-lanes = <1>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "fck";
max-functions = /bits/ 8 <1>;
status = "disabled";
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;

6
arch/arm64/boot/dts/ti/k3-am642-evm.dts
View File

@ -705,12 +705,6 @@ &pcie0_rc {
num-lanes = <1>;
};
&pcie0_ep {
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
num-lanes = <1>;
};
&ecap0 {
status = "okay";
/* PWM is available on Pin 1 of header J12 */