thermal: renesas: rzg3e: make min and max temperature per-chip

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have
different minimum and maximum temperatures compared to the already
supported RZ/G3E.

Prepare for them by moving these into a chip-specific struct.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: John Madieu <john.madieu.xa@bp.renesas.com>
Tested-by: John Madieu <john.madieu.xa@bp.renesas.com>
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Link: https://patch.msgid.link/20260108195223.193531-3-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Cosmin Tanislav 2026-01-08 21:52:20 +02:00 committed by Daniel Lezcano
parent 671d315c1c
commit 6c7f87f517

View File

@ -62,8 +62,6 @@
#define TSU_SICR_CMPCLR BIT(1)
/* Temperature calculation constants from datasheet */
#define TSU_TEMP_D (-41)
#define TSU_TEMP_E 126
#define TSU_CODE_MAX 0xFFF
/* Timing specifications from datasheet */
@ -72,6 +70,11 @@
#define TSU_POLL_DELAY_US 10 /* Polling interval */
#define TSU_MIN_CLOCK_RATE 24000000 /* TSU_PCLK minimum 24MHz */
struct rzg3e_thermal_info {
int temp_d_mc;
int temp_e_mc;
};
/**
* struct rzg3e_thermal_priv - RZ/G3E TSU private data
* @base: TSU register base
@ -79,6 +82,7 @@
* @syscon: regmap for calibration values
* @zone: thermal zone device
* @rstc: reset control
* @info: chip type specific information
* @trmval0: calibration value 0 (b)
* @trmval1: calibration value 1 (c)
* @trim_offset: offset for trim registers in syscon
@ -90,6 +94,7 @@ struct rzg3e_thermal_priv {
struct regmap *syscon;
struct thermal_zone_device *zone;
struct reset_control *rstc;
const struct rzg3e_thermal_info *info;
u16 trmval0;
u16 trmval1;
u32 trim_offset;
@ -161,17 +166,17 @@ static void rzg3e_thermal_power_off(struct rzg3e_thermal_priv *priv)
*/
static int rzg3e_thermal_code_to_temp(struct rzg3e_thermal_priv *priv, u16 code)
{
int temp_e_mc = TSU_TEMP_E * MILLIDEGREE_PER_DEGREE;
int temp_d_mc = TSU_TEMP_D * MILLIDEGREE_PER_DEGREE;
const struct rzg3e_thermal_info *info = priv->info;
s64 numerator, denominator;
int temp_mc;
numerator = (temp_e_mc - temp_d_mc) * (s64)(code - priv->trmval0);
numerator = (info->temp_e_mc - info->temp_d_mc) *
(s64)(code - priv->trmval0);
denominator = priv->trmval1 - priv->trmval0;
temp_mc = div64_s64(numerator, denominator) + temp_d_mc;
temp_mc = div64_s64(numerator, denominator) + info->temp_d_mc;
return clamp(temp_mc, temp_d_mc, temp_e_mc);
return clamp(temp_mc, info->temp_d_mc, info->temp_e_mc);
}
/*
@ -180,13 +185,12 @@ static int rzg3e_thermal_code_to_temp(struct rzg3e_thermal_priv *priv, u16 code)
*/
static u16 rzg3e_thermal_temp_to_code(struct rzg3e_thermal_priv *priv, int temp_mc)
{
int temp_e_mc = TSU_TEMP_E * MILLIDEGREE_PER_DEGREE;
int temp_d_mc = TSU_TEMP_D * MILLIDEGREE_PER_DEGREE;
const struct rzg3e_thermal_info *info = priv->info;
s64 numerator, denominator;
s64 code;
numerator = (temp_mc - temp_d_mc) * (priv->trmval1 - priv->trmval0);
denominator = temp_e_mc - temp_d_mc;
numerator = (temp_mc - info->temp_d_mc) * (priv->trmval1 - priv->trmval0);
denominator = info->temp_e_mc - info->temp_d_mc;
code = div64_s64(numerator, denominator) + priv->trmval0;
@ -392,6 +396,8 @@ static int rzg3e_thermal_probe(struct platform_device *pdev)
return ret;
platform_set_drvdata(pdev, priv);
priv->info = device_get_match_data(dev);
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
@ -526,8 +532,13 @@ static const struct dev_pm_ops rzg3e_thermal_pm_ops = {
SYSTEM_SLEEP_PM_OPS(rzg3e_thermal_suspend, rzg3e_thermal_resume)
};
static const struct rzg3e_thermal_info rzg3e_thermal_info = {
.temp_d_mc = -41000,
.temp_e_mc = 126000,
};
static const struct of_device_id rzg3e_thermal_dt_ids[] = {
{ .compatible = "renesas,r9a09g047-tsu" },
{ .compatible = "renesas,r9a09g047-tsu", .data = &rzg3e_thermal_info },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rzg3e_thermal_dt_ids);