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ASoC: nau8822: add speaker Bridge Tied Output
Merge series from Francesco Dolcini <francesco@dolcini.it>: Add support for BTL (Bridge Tied Load) configuration to NAU8822 audio codec, since this requires adding a new property to the binding convert it from txt to yaml first.
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commit
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NAU8822 audio CODEC
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This device supports I2C only.
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Required properties:
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- compatible : "nuvoton,nau8822"
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- reg : the I2C address of the device.
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Example:
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codec: nau8822@1a {
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compatible = "nuvoton,nau8822";
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reg = <0x1a>;
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};
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40
Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml
Normal file
40
Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml
Normal file
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nuvoton,nau8822.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NAU8822 audio CODEC
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description: |
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24 bit stereo audio codec with speaker driver.
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This device supports I2C/SPI.
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maintainers:
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- David Lin <CTLIN0@nuvoton.com>
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properties:
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compatible:
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enum:
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- nuvoton,nau8822
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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codec@1a {
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compatible = "nuvoton,nau8822";
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reg = <0x1a>;
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};
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};
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@ -1056,6 +1056,7 @@ static const int update_reg[] = {
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static int nau8822_probe(struct snd_soc_component *component)
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{
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int i;
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struct device_node *of_node = component->dev->of_node;
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/*
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* Set the update bit in all registers, that have one. This way all
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@ -1066,6 +1067,14 @@ static int nau8822_probe(struct snd_soc_component *component)
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snd_soc_component_update_bits(component,
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update_reg[i], 0x100, 0x100);
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/* Check property to configure the two loudspeaker outputs as
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* a single Bridge Tied Load output
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*/
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if (of_property_read_bool(of_node, "nuvoton,spk-btl"))
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snd_soc_component_update_bits(component,
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NAU8822_REG_RIGHT_SPEAKER_CONTROL,
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NAU8822_RSUBBYP, NAU8822_RSUBBYP);
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return 0;
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}
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@ -187,6 +187,15 @@
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/* NAU8822_REG_PLL_K3 (0x27) */
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#define NAU8822_PLLK3_MASK 0x1FF
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/* NAU8822_REG_RIGHT_SPEAKER_CONTROL (0x2B) */
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#define NAU8822_RMIXMUT 0x20
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#define NAU8822_RSUBBYP 0x10
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#define NAU8822_RAUXRSUBG_SFT 1
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#define NAU8822_RAUXRSUBG_MASK 0x0E
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#define NAU8822_RAUXSMUT 0x01
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/* System Clock Source */
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enum {
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NAU8822_CLK_MCLK,
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