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dt-bindings: clock: convert amlogic,meson8b-clkc.txt to dtschema

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Convert the Amlogic Meson8, Meson8b and Meson8m2 Clock and
Reset Controller to dt-schema.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240911-topic-amlogic-arm32-upstream-bindings-fixes-convert-meson8-clkc-v1-1-e0b8623c090d@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Neil Armstrong 2024-09-11 17:09:06 +02:00 committed by Jerome Brunet
parent 9852d85ec9
commit 6bac1ffa9c
2 changed files with 45 additions and 51 deletions
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45
Documentation/devicetree/bindings/clock/amlogic,meson8-clkc.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/amlogic,meson8-clkc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Controller
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
properties:
compatible:
oneOf:
- enum:
- amlogic,meson8-clkc
- amlogic,meson8b-clkc
- items:
- const: amlogic,meson8m2-clkc
- const: amlogic,meson8-clkc
clocks:
minItems: 2
maxItems: 3
clock-names:
minItems: 2
items:
- const: xtal
- const: ddr_pll
- const: clk_32k
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- clocks
- clock-names
- '#reset-cells'
additionalProperties: false

51
Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
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* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
supplies clock to various controllers within the SoC.
Required Properties:
- compatible: must be one of:
- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
- #clock-cells: should be 1.
- #reset-cells: should be 1.
- clocks: list of clock phandles, one for each entry in clock-names
- clock-names: should contain the following:
* "xtal": the 24MHz system oscillator
* "ddr_pll": the DDR PLL clock
* "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
Parent node should have the following properties :
- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
- reg: base address and size of the HHI system control register space.
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All available clocks are defined as
preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
used in device tree sources.
Similarly a preprocessor macro for each reset line is defined in
dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
device tree sources).
Example: Clock controller node:
clkc: clock-controller {
compatible = "amlogic,meson8b-clkc";
#clock-cells = <1>;
#reset-cells = <1>;
};
Example: UART controller node that consumes the clock generated by the clock
controller:
uart_AO: serial@c81004c0 {
compatible = "amlogic,meson-uart";
reg = <0xc81004c0 0x14>;
interrupts = <0 90 1>;
clocks = <&clkc CLKID_CLK81>;
};