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mmc: sdhci-esdhc-imx: fix host version read
commitef4d0888bbupstream. When commit95a2482(mmc: sdhci-esdhc-imx: add basic imx6q usdhc support) works around host version issue on imx6q, it gets the register address fixup "reg ^= 2" lost for imx25/35/51/53 esdhc. Thus, the controller version on these SoCs is wrongly identified as v1 while it's actually v2. Add the address fixup back and take a different approach to correct imx6q host version, so that the host version read gets back to work for all SoCs. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -232,15 +232,18 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
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static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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if (unlikely(reg == SDHCI_HOST_VERSION)) {
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u16 val = readw(host->ioaddr + (reg ^ 2));
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/*
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* uSDHC supports SDHCI v3.0, but it's encoded as value
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* 0x3 in host controller version register, which violates
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* SDHCI_SPEC_300 definition. Work it around here.
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*/
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if ((val & SDHCI_SPEC_VER_MASK) == 3)
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return --val;
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reg ^= 2;
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if (is_imx6q_usdhc(imx_data)) {
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/*
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* The usdhc register returns a wrong host version.
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* Correct it here.
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*/
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return SDHCI_SPEC_300;
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}
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}
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return readw(host->ioaddr + reg);
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