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drm/amd/display: change dcc_rate from 1 to 2 for log use only

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[why]
The dcc_rate value does not affect any watermark, TTU or DLG output; it
only affects the Z8 stutter-related logging. The hardware
DisplayModeSupported formula uses a dcc_rate of 4, while DML2 currently
uses 1.

[how]
Change dcc_rate from 1 to 2 so the logged value is closer to the
hardware formula.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2026-06-18 19:49:52 -04:00 committed by Alex Deucher
parent 5adb54abe5
commit 6a8b6a7288
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c
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@ -447,8 +447,8 @@ static void populate_dml21_dummy_surface_cfg(struct dml2_surface_cfg *surface, c
surface->plane0.pitch = ((surface->plane0.width + 127) / 128) * 128;
surface->plane1.pitch = 0;
surface->dcc.enable = false;
surface->dcc.informative.dcc_rate_plane0 = 1.0;
surface->dcc.informative.dcc_rate_plane1 = 1.0;
surface->dcc.informative.dcc_rate_plane0 = 2.0;
surface->dcc.informative.dcc_rate_plane1 = 2.0;
surface->dcc.informative.fraction_of_zero_size_request_plane0 = 0;
surface->dcc.informative.fraction_of_zero_size_request_plane1 = 0;
surface->tiling = dml2_sw_64kb_2d;
@ -517,8 +517,8 @@ static void populate_dml21_surface_config_from_plane_state(
surface->plane1.height = plane_state->plane_size.chroma_size.height;
surface->plane1.width = plane_state->plane_size.chroma_size.width;
surface->dcc.enable = plane_state->dcc.enable;
surface->dcc.informative.dcc_rate_plane0 = 1.0;
surface->dcc.informative.dcc_rate_plane1 = 1.0;
surface->dcc.informative.dcc_rate_plane0 = 2.0;
surface->dcc.informative.dcc_rate_plane1 = 2.0;
surface->dcc.informative.fraction_of_zero_size_request_plane0 = plane_state->dcc.independent_64b_blks;
surface->dcc.informative.fraction_of_zero_size_request_plane1 = plane_state->dcc.independent_64b_blks_c;
surface->dcc.plane0.pitch = plane_state->dcc.meta_pitch;