From b3acbca3c80e612478b354e43c1480c3fc15873e Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 19 Sep 2022 11:46:06 +0100 Subject: [PATCH 01/14] soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS GPIOLIB and PINCTRL config options are required by all ARM32/ARM64/RISC-V Renesas SoCs, so instead of selecting them under ARCH_RENESAS for each architecture just explicitly select them under SOC_RENESAS config option which will be visible for all the three architectures (if ARCH_RENESAS is enabled). Suggested-by: Geert Uytterhoeven Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20220919104606.96553-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index f95a1337450d..660498252ec5 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -2,6 +2,8 @@ menuconfig SOC_RENESAS bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS default y if ARCH_RENESAS + select GPIOLIB + select PINCTRL select SOC_BUS if SOC_RENESAS From 7e8edf55cf729367afdb5e9a8b182f1d47897800 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 26 Oct 2022 09:50:33 -0500 Subject: [PATCH 02/14] ARM: keystone: Replace platform SMP with PSCI The KS2 boot monitor supports PSCI commands. These are already defined in DT for KS2. We can drop this platform override and remove related code without changing SMP. Do this here. Signed-off-by: Andrew Davis Signed-off-by: Nishanth Menon Link: https://lore.kernel.org/r/20221026145033.17905-1-afd@ti.com --- arch/arm/mach-keystone/Makefile | 4 +-- arch/arm/mach-keystone/keystone.c | 2 -- arch/arm/mach-keystone/keystone.h | 5 ---- arch/arm/mach-keystone/platsmp.c | 41 ------------------------------- arch/arm/mach-keystone/smc.S | 26 -------------------- 5 files changed, 1 insertion(+), 77 deletions(-) delete mode 100644 arch/arm/mach-keystone/platsmp.c delete mode 100644 arch/arm/mach-keystone/smc.S diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index 739b38be5696..0c1d54aec60f 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile @@ -1,7 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y := keystone.o smc.o - -obj-$(CONFIG_SMP) += platsmp.o +obj-y := keystone.o # PM domain driver for Keystone SOCs obj-$(CONFIG_ARCH_KEYSTONE) += pm_domain.o diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c index 2c647bdf8d25..aa352c2de313 100644 --- a/arch/arm/mach-keystone/keystone.c +++ b/arch/arm/mach-keystone/keystone.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include "memory.h" @@ -103,7 +102,6 @@ DT_MACHINE_START(KEYSTONE, "Keystone") #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) .dma_zone_size = SZ_2G, #endif - .smp = smp_ops(keystone_smp_ops), .init_machine = keystone_init, .dt_compat = keystone_match, .pv_fixup = keystone_pv_fixup, diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h index 438e531cc007..71ff8cd2ee4a 100644 --- a/arch/arm/mach-keystone/keystone.h +++ b/arch/arm/mach-keystone/keystone.h @@ -8,13 +8,8 @@ #ifndef __KEYSTONE_H__ #define __KEYSTONE_H__ -#define KEYSTONE_MON_CPU_UP_IDX 0x00 - #ifndef __ASSEMBLER__ -extern const struct smp_operations keystone_smp_ops; -extern void secondary_startup(void); -extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr); extern int keystone_pm_runtime_init(void); #endif /* __ASSEMBLER__ */ diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c deleted file mode 100644 index 673fcf3b34b1..000000000000 --- a/arch/arm/mach-keystone/platsmp.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Keystone SOC SMP platform code - * - * Copyright 2013 Texas Instruments, Inc. - * Cyril Chemparathy - * Santosh Shilimkar - * - * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include "keystone.h" - -static int keystone_smp_boot_secondary(unsigned int cpu, - struct task_struct *idle) -{ - unsigned long start = virt_to_idmap(&secondary_startup); - int error; - - pr_debug("keystone-smp: booting cpu %d, vector %08lx\n", - cpu, start); - - error = keystone_cpu_smc(KEYSTONE_MON_CPU_UP_IDX, cpu, start); - if (error) - pr_err("CPU %d bringup failed with %d\n", cpu, error); - - return error; -} - -const struct smp_operations keystone_smp_ops __initconst = { - .smp_boot_secondary = keystone_smp_boot_secondary, -}; diff --git a/arch/arm/mach-keystone/smc.S b/arch/arm/mach-keystone/smc.S deleted file mode 100644 index 21ef75cf5370..000000000000 --- a/arch/arm/mach-keystone/smc.S +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Keystone Secure APIs - * - * Copyright (C) 2013 Texas Instruments, Inc. - * Santosh Shilimkar - */ - -#include - -/** - * u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr) - * - * Low level CPU monitor API - * @command: Monitor command. - * @cpu: CPU Number - * @addr: Kernel jump address for boot CPU - * - * Return: Non zero value on failure - */ - .arch_extension sec -ENTRY(keystone_cpu_smc) - stmfd sp!, {r4-r11, lr} - smc #0 - ldmfd sp!, {r4-r11, pc} -ENDPROC(keystone_cpu_smc) From d32b93ed0cacf8c256ac197f5da78c326f29b329 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 27 Oct 2022 12:23:00 +0100 Subject: [PATCH 03/14] ARM: shmobile: Drop selecting GPIOLIB and PINCTRL Do not automatically select the GPIOLIB and PINCTRL config options as they are already automatically selected as part of the SOC_RENESAS config option in drivers/soc/renesas/Kconfig. Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20221027112300.77184-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm/mach-shmobile/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 37f862f13c8d..8d64cc7edccd 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -3,7 +3,5 @@ menuconfig ARCH_RENESAS bool "Renesas ARM SoCs" depends on ARCH_MULTI_V7 select ARM_GIC - select GPIOLIB select NO_IOPORT_MAP - select PINCTRL select ZONE_DMA if ARM_LPAE From d84ea59e20158ca7a1b6c1dfc3c0e2e652eb4b00 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 27 Oct 2022 12:24:59 +0100 Subject: [PATCH 04/14] arm64: renesas: Drop selecting GPIOLIB and PINCTRL Do not automatically select the GPIOLIB and PINCTRL config options as they are already automatically selected as part of the SOC_RENESAS config option in drivers/soc/renesas/Kconfig. Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20221027112459.77413-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/Kconfig.platforms | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 76580b932e44..d1970adf80ab 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -252,8 +252,6 @@ config ARCH_REALTEK config ARCH_RENESAS bool "Renesas SoC Platforms" - select GPIOLIB - select PINCTRL help This enables support for the ARMv8 based Renesas SoCs. From b29ea0e7e8122a11e9336fb89e96ca7ccdb314ae Mon Sep 17 00:00:00 2001 From: wangjianli Date: Thu, 20 Oct 2022 20:45:58 +0800 Subject: [PATCH 05/14] arm/mach-ux500: fix repeated words in comments Delete the redundant word 'in'. Signed-off-by: wangjianli Link: https://lore.kernel.org/r/20221020124558.38060-1-wangjianli@cdjrlc.com Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c index ff9c375e4277..505161bb8855 100644 --- a/arch/arm/mach-ux500/pm.c +++ b/arch/arm/mach-ux500/pm.c @@ -124,7 +124,7 @@ bool prcmu_pending_irq(void) } /* - * This function checks if the specified cpu is in in WFI. It's usage + * This function checks if the specified cpu is in WFI. It's usage * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple * function. Of course passing smp_processor_id() to this function will * always return false... From 65b0e307a1a9193571db12910f382f84195a3d29 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Tue, 8 Nov 2022 13:37:55 +0100 Subject: [PATCH 06/14] ARM: ux500: do not directly dereference __iomem Sparse reports that calling add_device_randomness() on `uid` is a violation of address spaces. And indeed the next usage uses readl() properly, but that was left out when passing it toadd_device_ randomness(). So instead copy the whole thing to the stack first. Fixes: 4040d10a3d44 ("ARM: ux500: add DB serial number to entropy pool") Cc: Linus Walleij Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/202210230819.loF90KDh-lkp@intel.com/ Reported-by: kernel test robot Signed-off-by: Jason A. Donenfeld Link: https://lore.kernel.org/r/20221108123755.207438-1-Jason@zx2c4.com Signed-off-by: Linus Walleij --- drivers/soc/ux500/ux500-soc-id.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/soc/ux500/ux500-soc-id.c b/drivers/soc/ux500/ux500-soc-id.c index a9472e0e5d61..27d6e25a0115 100644 --- a/drivers/soc/ux500/ux500-soc-id.c +++ b/drivers/soc/ux500/ux500-soc-id.c @@ -167,20 +167,18 @@ ATTRIBUTE_GROUPS(ux500_soc); static const char *db8500_read_soc_id(struct device_node *backupram) { void __iomem *base; - void __iomem *uid; const char *retstr; + u32 uid[5]; base = of_iomap(backupram, 0); if (!base) return NULL; - uid = base + 0x1fc0; + memcpy_fromio(uid, base + 0x1fc0, sizeof(uid)); /* Throw these device-specific numbers into the entropy pool */ - add_device_randomness(uid, 0x14); + add_device_randomness(uid, sizeof(uid)); retstr = kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", - readl((u32 *)uid+0), - readl((u32 *)uid+1), readl((u32 *)uid+2), - readl((u32 *)uid+3), readl((u32 *)uid+4)); + uid[0], uid[1], uid[2], uid[3], uid[4]); iounmap(base); return retstr; } From 2f89fbc94bce85b4253358bf6554d9d6fc36825f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Nov 2022 21:18:42 +0100 Subject: [PATCH 07/14] ARM: ux500: Drop unused register file This file with all base addresses and offsets is not used anymore, everything is looked up from the device tree. Delete it. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/cpu-db8500.c | 1 - arch/arm/mach-ux500/db8500-regs.h | 195 ------------------------------ arch/arm/mach-ux500/platsmp.c | 2 - arch/arm/mach-ux500/pm.c | 2 - 4 files changed, 200 deletions(-) delete mode 100644 arch/arm/mach-ux500/db8500-regs.h diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index e929aaa744c0..7cc0dd8ed991 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -26,7 +26,6 @@ #include #include -#include "db8500-regs.h" #include "pm_domains.h" static int __init ux500_l2x0_unlock(void) diff --git a/arch/arm/mach-ux500/db8500-regs.h b/arch/arm/mach-ux500/db8500-regs.h deleted file mode 100644 index 0d47d7171d9b..000000000000 --- a/arch/arm/mach-ux500/db8500-regs.h +++ /dev/null @@ -1,195 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) ST-Ericsson SA 2010 - */ - -#ifndef __MACH_DB8500_REGS_H -#define __MACH_DB8500_REGS_H - -/* Base address and bank offsets for ESRAM */ -#define U8500_ESRAM_BASE 0x40000000 -#define U8500_ESRAM_BANK_SIZE 0x00020000 -#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE -#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE) -#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE) -/* - * on V1 DMA uses 4KB for logical parameters position is right after the 64KB - * reserved for security - */ -#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 - -#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET) - -/* This address fulfills the 256k alignment requirement of the lcla base */ -#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4 - -#define U8500_PER3_BASE 0x80000000 -#define U8500_STM_BASE 0x80100000 -#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) -#define U8500_PER2_BASE 0x80110000 -#define U8500_PER1_BASE 0x80120000 -#define U8500_B2R2_BASE 0x80130000 -#define U8500_HSEM_BASE 0x80140000 -#define U8500_PER4_BASE 0x80150000 -#define U8500_TPIU_BASE 0x80190000 -#define U8500_ICN_BASE 0x81000000 - -#define U8500_BOOT_ROM_BASE 0x90000000 -/* ASIC ID is at 0xbf4 offset within this region */ -#define U8500_ASIC_ID_BASE 0x9001D000 - -#define U8500_PER6_BASE 0xa03c0000 -#define U8500_PER7_BASE 0xa03d0000 -#define U8500_PER5_BASE 0xa03e0000 - -#define U8500_SVA_BASE 0xa0100000 -#define U8500_SIA_BASE 0xa0200000 - -#define U8500_SGA_BASE 0xa0300000 -#define U8500_MCDE_BASE 0xa0350000 -#define U8500_DMA_BASE 0x801C0000 /* v1 */ - -#define U8500_SBAG_BASE 0xa0390000 - -#define U8500_SCU_BASE 0xa0410000 -#define U8500_GIC_CPU_BASE 0xa0410100 -#define U8500_TWD_BASE 0xa0410600 -#define U8500_GIC_DIST_BASE 0xa0411000 -#define U8500_L2CC_BASE 0xa0412000 - -#define U8500_MODEM_I2C 0xb7e02000 - -#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000) -#define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000) -#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) -#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) - -#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) -#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) - -/* per6 base addresses */ -#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) -#define U8500_HASH0_BASE (U8500_PER6_BASE + 0x1000) -#define U8500_HASH1_BASE (U8500_PER6_BASE + 0x2000) -#define U8500_PKA_BASE (U8500_PER6_BASE + 0x4000) -#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x5100) -#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */ -#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */ -#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */ -#define U8500_CRYP0_BASE (U8500_PER6_BASE + 0xa000) -#define U8500_CRYP1_BASE (U8500_PER6_BASE + 0xb000) -#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) - -/* per5 base addresses */ -#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) -#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) - -/* per4 base addresses */ -#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) -#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) -#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) -#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x03000) -#define U8500_RTC_BASE (U8500_PER4_BASE + 0x04000) -#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000) -#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000) -#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) -#define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000) -#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) -#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000) -#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338) -#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450) - -/* per3 base addresses */ -#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) -#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000) -#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000) -#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000) -#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000) -#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000) -#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) -#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) -#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) - -/* per2 base addresses */ -#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) -#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) -#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) -#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000) -#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000) -#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000) -#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000) -#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000) -#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) -#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000) -#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000) -#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) - -/* per1 base addresses */ -#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000) -#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000) -#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000) -#define U8500_MSP3_BASE (U8500_PER1_BASE + 0x5000) -#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000) -#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000) -#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) -#define U8500_I2C4_BASE (U8500_PER1_BASE + 0xa000) -#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xb000) -#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) - -#define U8500_SHRM_GOP_INTERRUPT_BASE 0xB7C00040 - -#define U8500_GPIOBANK0_BASE U8500_GPIO0_BASE -#define U8500_GPIOBANK1_BASE (U8500_GPIO0_BASE + 0x80) -#define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE -#define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80) -#define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100) -#define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180) -#define U8500_GPIOBANK6_BASE U8500_GPIO2_BASE -#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80) -#define U8500_GPIOBANK8_BASE U8500_GPIO3_BASE - -#define U8500_MCDE_SIZE 0x1000 -#define U8500_DSI_LINK_SIZE 0x1000 -#define U8500_DSI_LINK1_BASE (U8500_MCDE_BASE + U8500_MCDE_SIZE) -#define U8500_DSI_LINK2_BASE (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE) -#define U8500_DSI_LINK3_BASE (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE) -#define U8500_DSI_LINK_COUNT 0x3 - -/* Modem and APE physical addresses */ -#define U8500_MODEM_BASE 0xe000000 -#define U8500_APE_BASE 0x6000000 - -/* SoC identification number information */ -#define U8500_BB_UID_BASE (U8500_BACKUPRAM1_BASE + 0xFC0) - -/* Offsets to specific addresses in some IP blocks for DMA */ -#define MSP_TX_RX_REG_OFFSET 0 -#define CRYP1_RX_REG_OFFSET 0x10 -#define CRYP1_TX_REG_OFFSET 0x8 -#define HASH1_TX_REG_OFFSET 0x4 - -/* - * Macros to get at IO space when running virtually - * We dont map all the peripherals, let ioremap do - * this for us. We map only very basic peripherals here. - */ -#define U8500_IO_VIRTUAL 0xf0000000 -#define U8500_IO_PHYSICAL 0xa0000000 -/* This is where we map in the ROM to check ASIC IDs */ -#define UX500_VIRT_ROM IOMEM(0xf0000000) - -/* This macro is used in assembly, so no cast */ -#define IO_ADDRESS(x) \ - (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) - -/* typesafe io address */ -#define __io_address(n) IOMEM(IO_ADDRESS(n)) - -/* Used by some plat-nomadik code */ -#define io_p2v(n) __io_address(n) - -#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) - -#endif diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 415d8ad2a3c1..656b58bd296a 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -20,8 +20,6 @@ #include #include -#include "db8500-regs.h" - /* Magic triggers in backup RAM */ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c index 505161bb8855..dc962d006b08 100644 --- a/arch/arm/mach-ux500/pm.c +++ b/arch/arm/mach-ux500/pm.c @@ -16,8 +16,6 @@ #include #include -#include "db8500-regs.h" - /* ARM WFI Standby signal register */ #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) #define PRCM_ARM_WFI_STANDBY_WFI0 0x08 From 8292493c22c8e28b6e67a01e0f5c6db1cf231eb1 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 28 Oct 2022 17:59:17 +0100 Subject: [PATCH 08/14] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs. We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Conor Dooley Reviewed-by: Guo Ren Acked-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20221028165921.94487-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/riscv/Kconfig.socs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..75fb0390d6bd 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -7,6 +7,11 @@ config SOC_MICROCHIP_POLARFIRE help This enables support for Microchip PolarFire SoC platforms. +config ARCH_RENESAS + bool "Renesas RISC-V SoCs" + help + This enables support for the RISC-V based Renesas SoCs. + config SOC_SIFIVE bool "SiFive SoCs" select SERIAL_SIFIVE if TTY From aa4188ea0f5d3b85d3405964d924d443648b6ca0 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Nov 2022 14:35:16 +0100 Subject: [PATCH 09/14] ARM: mxs: Remove unneeded #include Commit 7705b5ed8adccd92 ("ARM: mxs: remove obsolete startup code for TX28") removed the last user of the pinctrl consumer API. Signed-off-by: Geert Uytterhoeven Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/mach-mxs.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 25c9d184fa4c..02afedcc9418 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include From 72684faf703cbb12ec944df91f45949973f2d6f7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Nov 2022 14:35:58 +0100 Subject: [PATCH 10/14] ARM: imx3: Remove unneeded #include Commit 6c5f05a6cd88c77f ("ARM: imx3: Remove imx3 soc_init()") removed the last user of the pinctrl machine API. Signed-off-by: Geert Uytterhoeven Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mm-imx3.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 28db97289ee8..0788c5cc7f9e 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include From 738b1985cbd1eec3f0be645c807745b16d378705 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Tue, 15 Nov 2022 13:31:02 +0100 Subject: [PATCH 11/14] MAINTAINERS: adjust ARM/INTEL IXP4XX ARM ARCHITECTURE to ixp4xx clean-up Commit c83227a5d05e ("irq/gpio: ixp4xx: Drop boardfile probe path") and commit 155e4306107f ("clocksource/drivers/ixp4xx: Drop boardfile probe path") remove files include/linux/irqchip/irq-ixp4xx.h and include/linux/platform_data/timer-ixp4xx.h, but miss to adjust MAINTAINERS. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about broken references. Remove file entries for those files in ARM/INTEL IXP4XX ARM ARCHITECTURE. Signed-off-by: Lukas Bulwahn Link: https://lore.kernel.org/r/20221115123102.22732-1-lukas.bulwahn@gmail.com Signed-off-by: Linus Walleij --- MAINTAINERS | 2 -- 1 file changed, 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index cf0f18502372..a83c41e4d6b7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2272,8 +2272,6 @@ F: drivers/clocksource/timer-ixp4xx.c F: drivers/crypto/ixp4xx_crypto.c F: drivers/gpio/gpio-ixp4xx.c F: drivers/irqchip/irq-ixp4xx.c -F: include/linux/irqchip/irq-ixp4xx.h -F: include/linux/platform_data/timer-ixp4xx.h ARM/INTEL KEEMBAY ARCHITECTURE M: Paul J. Murphy From dc6e328a8d28e1c0c6e4f19e90cca17bb8fc126b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sun, 20 Nov 2022 23:47:06 +0100 Subject: [PATCH 12/14] ARM: ixp4xx: Remove unused static map The IXP4xx is just using the device tree now, only keep the static UART map if and only if we are debugging. Signed-off-by: Linus Walleij --- arch/arm/mach-ixp4xx/ixp4xx-of.c | 25 ++++--------------------- 1 file changed, 4 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-ixp4xx/ixp4xx-of.c b/arch/arm/mach-ixp4xx/ixp4xx-of.c index f543e2adae0c..9f1557f33e84 100644 --- a/arch/arm/mach-ixp4xx/ixp4xx-of.c +++ b/arch/arm/mach-ixp4xx/ixp4xx-of.c @@ -9,27 +9,8 @@ #include #include -/* - * These are the only fixed phys to virt mappings we ever need - * we put it right after the UART mapping at 0xffc80000-0xffc81fff - */ -#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000 -#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEC14000 - -static struct map_desc ixp4xx_of_io_desc[] __initdata = { - /* - * This is needed for runtime system configuration checks, - * such as reading if hardware so-and-so is present. This - * could eventually be converted into a syscon once all boards - * are converted to device tree. - */ - { - .virtual = IXP4XX_EXP_CFG_BASE_VIRT, - .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS), - .length = SZ_4K, - .type = MT_DEVICE, - }, #ifdef CONFIG_DEBUG_UART_8250 +static struct map_desc ixp4xx_of_io_desc[] __initdata = { /* This is needed for LL-debug/earlyprintk/debug-macro.S */ { .virtual = CONFIG_DEBUG_UART_VIRT, @@ -37,13 +18,15 @@ static struct map_desc ixp4xx_of_io_desc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, -#endif }; static void __init ixp4xx_of_map_io(void) { iotable_init(ixp4xx_of_io_desc, ARRAY_SIZE(ixp4xx_of_io_desc)); } +#else +#define ixp4xx_of_map_io NULL +#endif /* * We handle 4 different SoC families. These compatible strings are enough From 894799e1f4969822d7039628897e102835677140 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Thu, 17 Nov 2022 11:51:31 +0100 Subject: [PATCH 13/14] MAINTAINERS: Add DHCOR to the DH electronic i.MX6 board support Add DHCOR to the DH electronic i.MX6 board support to cover the DHCOR i.MX6ULL SoM. It is a solderable SoM. Signed-off-by: Christoph Niedermaier Acked-by: Shawn Guo Signed-off-by: Arnd Bergmann --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index e4556ee0408c..4846b72f7e52 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6028,11 +6028,12 @@ F: include/net/devlink.h F: include/uapi/linux/devlink.h F: net/core/devlink.c -DH ELECTRONICS IMX6 DHCOM BOARD SUPPORT +DH ELECTRONICS IMX6 DHCOM/DHCOR BOARD SUPPORT M: Christoph Niedermaier L: kernel@dh-electronics.com S: Maintained F: arch/arm/boot/dts/imx6*-dhcom-* +F: arch/arm/boot/dts/imx6*-dhcor-* DH ELECTRONICS STM32MP1 DHCOM/DHCOR BOARD SUPPORT M: Marek Vasut From c93d8b457461d235ccff6c6864ead6a55ef1c18b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 21 Nov 2022 23:10:15 +0100 Subject: [PATCH 14/14] ARM: ixp4xx: Remove unused debug iomap If we don't provide the .map_io() callback, the LL debug defines will kick in anyway, so delete the UART debug map as well. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20221121221015.1454948-1-linus.walleij@linaro.org Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/ixp4xx-of.c | 25 ------------------------- 1 file changed, 25 deletions(-) diff --git a/arch/arm/mach-ixp4xx/ixp4xx-of.c b/arch/arm/mach-ixp4xx/ixp4xx-of.c index 9f1557f33e84..1b4d84a5b02f 100644 --- a/arch/arm/mach-ixp4xx/ixp4xx-of.c +++ b/arch/arm/mach-ixp4xx/ixp4xx-of.c @@ -2,31 +2,7 @@ /* * IXP4xx Device Tree boot support */ -#include -#include -#include - #include -#include - -#ifdef CONFIG_DEBUG_UART_8250 -static struct map_desc ixp4xx_of_io_desc[] __initdata = { - /* This is needed for LL-debug/earlyprintk/debug-macro.S */ - { - .virtual = CONFIG_DEBUG_UART_VIRT, - .pfn = __phys_to_pfn(CONFIG_DEBUG_UART_PHYS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void __init ixp4xx_of_map_io(void) -{ - iotable_init(ixp4xx_of_io_desc, ARRAY_SIZE(ixp4xx_of_io_desc)); -} -#else -#define ixp4xx_of_map_io NULL -#endif /* * We handle 4 different SoC families. These compatible strings are enough @@ -42,6 +18,5 @@ static const char *ixp4xx_of_board_compat[] = { }; DT_MACHINE_START(IXP4XX_DT, "IXP4xx (Device Tree)") - .map_io = ixp4xx_of_map_io, .dt_compat = ixp4xx_of_board_compat, MACHINE_END