github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-23 06:31:58 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

SoCFPGA DTS updates for v7.1

Browse Source 
- dt-bindings updates:
 	- Document fallback compatible for Stratix10 SoCDK eMMC board
 	- Document compatible for the Agilex5 SoCFPGA modular board
 
 - Add emmc support for the Stratix10
 - Drop CPU masks from the GICv3 PPI interrupts for Agilex5
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmnLMagACgkQGZQEC4Gj
 KPQ7uBAAgTu4ifShxyIfwlnC7LXxMBbjKvCiDTv7aUQzTyv3eAXG4Vy6YyV07Dw/
 0+ccAZj+dyyRf/vTRNWUYhCmu3X8iTUmlMj1IS9gCwYsBi/YJH5F5ZVUmEXPLm7m
 gR/AYgdWUOdM1dOm6NsPNL+lRS9yjN4mkNq2rKZa+/VdSf6I9ErkOauVmaGAGTiD
 72MpzQ+0UvAIrmKXhgELLlgBwVzQBQfbLEYGIbys4UgzIKs7EmtFXnQ9XSM0PGPB
 DZwZRrOWPVyTo7wxNZxQsnSKxDwGY2ZLQZQ6rg7TqY5FKnqg9XDJyMBWkhVM/Jhh
 Fry1/DVUCH/xuljSzppKWEccZ9HqZRlTTFfN2FshVJ8pMco7A6CrHdpC/3ZcTvHb
 pmtFdr6hdPxXDZVVa4AXkp7dp+n5ikwCHh+luoww+Vk29KBcFYqQBytgQ9WRLQZU
 X34CnbCKOvvRoMnkpmq0nblJeyPnY+Ibn9/dBlFqYjJ/lUsfCudD5/FVjDmRoDhe
 eriH4p2zDo3hYrB0vuKlGEHYLpa+j4n9pJ8qAHSPp5YVVvqpHJGWKO81kAcAJfPn
 IyUOl1SSUDdJIVO5AZDEsze5FWQwshz1BHUAMeWFOw4Hz/5QyqzTP3mVXQqSgRp+
 ykiCasMFsUDkZmAmVql/60LgmhBoi4SM5tDNyGQl1qyIEm+igAU=
 =3/wH
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnNiDkACgkQmmx57+YA
 GNnbWQ/9HOxDXWo5g8CKDhuC3EyMQn8W/UXiS/pjulNECTpLwQQS42DKVhgfMogy
 AMyh4jqr2KENCGnICdtDDRqTKAOMdngOyr5nB4Wmit2gGo9EdW/52Y3PnygfDBiT
 hAjQh7MimD9vag8e6S/8o51pZwZIpp3wDlGTO5vhWDYTWRN0Ia0Dvq8SSyHdcEnL
 WMj3tFkjVfiEAmVZSl3V34EuWwXZrTLetipJEdasSsKI0WTyYaApDv3jFdMjAMDu
 tvQh2hf0mZgiuU30yAZ4Be6n93QV2oKbRPDEyFFKi5ig7TeL5+hMfaA9APegjWoY
 LAqd9PNqn2katag8kA4Ve1NceHwPDcgQ6or/MNU+x7WN0fSEnQa1bp9xd//bCN8e
 Omag/xf7owWbQgFnoi7lubbj+8dX2QczdZMh5vQ6vBw7aL/qPVp7Zjs1rLC7P1n1
 O+Hx2b1x+GWK0wP62xT4zmkoNfllFfl62VAUk29DiGXFcaV5JjSt7OIbwBOhm0uK
 ouqzdFXiMO/9hCIeQlI4zOvi55twMNmgLAuz2LxCxCSJ5UYTkCrAiPyG//nQAbr8
 4tQeVEEMgictas/gxRUQ/70jOy+OsBw3MDzUKeEb1UDBeLACbJlaOFHsIrJF3z4v
 ZyF58kA7oFiI89TvF69EPrkCCXY993aQzrS9jXnQZXiVN2LpnmI=
 =6ggO
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_updates_for_v7.1_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v7.1
- dt-bindings updates:
	- Document fallback compatible for Stratix10 SoCDK eMMC board
	- Document compatible for the Agilex5 SoCFPGA modular board

- Add emmc support for the Stratix10
- Drop CPU masks from the GICv3 PPI interrupts for Agilex5

* tag 'socfpga_updates_for_v7.1_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: intel: agilex5: Drop CPU masks from GICv3 PPI interrupts
  dt-bindings: intel: Add Agilex5 SoCFPGA modular board
  arm64: dts: socfpga: stratix10: Add emmc support
  dt-bindings: altera: Add fallback compatible for Stratix 10 SoCDK eMMC variant

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-04-01 23:03:49 +02:00
commit 6935cce658
6 changed files with 166 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/arm/altera.yaml
View File

@ -84,6 +84,12 @@ properties:
- altr,socfpga-stratix10-swvp
- const: altr,socfpga-stratix10
- description: Stratix 10 SoCDK eMMC variant
items:
- const: altr,socfpga-stratix10-socdk-emmc
- const: altr,socfpga-stratix10-socdk
- const: altr,socfpga-stratix10
- description: AgileX boards
items:
- enum:
@ -105,6 +111,7 @@ properties:
- enum:
- intel,socfpga-agilex5-socdk
- intel,socfpga-agilex5-socdk-013b
- intel,socfpga-agilex5-socdk-modular
- intel,socfpga-agilex5-socdk-nand
- const: intel,socfpga-agilex5

1
arch/arm64/boot/dts/altera/Makefile
View File

@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \
socfpga_stratix10_socdk_emmc.dtb \
socfpga_stratix10_socdk_nand.dtb \
socfpga_stratix10_swvp.dtb

67
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -3,53 +3,11 @@
* Copyright Altera Corporation (C) 2015. All rights reserved.
*/
#include "socfpga_stratix10.dtsi"
#include "socfpga_stratix10_socdk.dtsi"
/ {
model = "SoCFPGA Stratix 10 SoCDK";
compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led-hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
led-hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
led-hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory@80000000 {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0x80000000 0 0>;
};
ref_033v: regulator-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
regulator-max-microvolt = <330000>;
};
};
&pinctrl0 {
@ -68,10 +26,6 @@ i2c1_pmx_func_gpio: i2c1-pmx-func-gpio-pins {
};
};
&gpio1 {
status = "okay";
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
@ -83,7 +37,7 @@ mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
phy0: ethernet-phy@4 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
@ -111,23 +65,6 @@ &mmc {
clk-phase-sd-hs = <0>, <135>;
};
&osc1 {
clock-frequency = <25000000>;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;

71
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtsi Executable file
View File

@ -0,0 +1,71 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright Altera Corporation (C) 2026. All rights reserved.
*/
#include "socfpga_stratix10.dtsi"
/ {
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led-hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
led-hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
led-hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory@80000000 {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0x80000000 0 0>;
};
ref_033v: regulator-0v33-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
regulator-max-microvolt = <330000>;
};
};
&gpio1 {
status = "okay";
};
&osc1 {
clock-frequency = <25000000>;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};

81
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts Executable file
View File

@ -0,0 +1,81 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright Altera Corporation (C) 2026. All rights reserved.
*/
#include "socfpga_stratix10_socdk.dtsi"
/ {
model = "SoCFPGA Stratix 10 SoCDK eMMC daughter board";
compatible = "altr,socfpga-stratix10-socdk-emmc",
"altr,socfpga-stratix10-socdk",
"altr,socfpga-stratix10";
};
&gmac2 {
status = "okay";
/* PHY delays is configured via skew properties */
phy-mode = "rgmii";
phy-handle = <&phy0>;
max-frame-size = <9000>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@4 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <900>; /* 0ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
};
};
};
&mmc {
status = "okay";
cap-mmc-highspeed;
broken-cd;
bus-width = <4>;
clk-phase-sd-hs = <0>, <135>;
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
vref-supply = <&ref_033v>;
};
temp@4c {
compatible = "maxim,max1619";
reg = <0x4c>;
};
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};

8
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
View File

@ -152,10 +152,10 @@ qspi_clk: qspi-clk {
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
usbphy0: usbphy {