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https://github.com/torvalds/linux.git
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Merge branch 'for-6.16/cxl-cleanups' into cxl-for-next
In preparation for code changes related to AMD Zen5 address translation support, a number of small code refactor and cleanups are send ahead.
This commit is contained in:
Dave Jiang
commit
68d8b4f399
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@ -419,7 +419,15 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
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rc = cxl_decoder_add(cxld, target_map);
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if (rc)
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return rc;
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return cxl_root_decoder_autoremove(dev, no_free_ptr(cxlrd));
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rc = cxl_root_decoder_autoremove(dev, no_free_ptr(cxlrd));
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if (rc)
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return rc;
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dev_dbg(root_port->dev.parent, "%s added to %s\n",
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dev_name(&cxld->dev), dev_name(&root_port->dev));
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return 0;
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}
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static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
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@ -28,7 +28,7 @@ static u32 cdat_normalize(u16 entry, u64 base, u8 type)
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*/
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if (entry == 0xffff || !entry)
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return 0;
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else if (base > (UINT_MAX / (entry)))
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if (base > (UINT_MAX / (entry)))
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return 0;
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/*
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@ -34,7 +34,8 @@ static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
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if (rc)
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return rc;
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dev_dbg(&cxld->dev, "Added to port %s\n", dev_name(&port->dev));
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dev_dbg(port->uport_dev, "%s added to %s\n",
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dev_name(&cxld->dev), dev_name(&port->dev));
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return 0;
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}
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@ -153,8 +153,8 @@ static ssize_t security_state_show(struct device *dev,
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return sysfs_emit(buf, "frozen\n");
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if (state & CXL_PMEM_SEC_STATE_LOCKED)
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return sysfs_emit(buf, "locked\n");
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else
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return sysfs_emit(buf, "unlocked\n");
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return sysfs_emit(buf, "unlocked\n");
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}
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static struct device_attribute dev_attr_security_state =
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__ATTR(state, 0444, security_state_show, NULL);
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@ -415,9 +415,40 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
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*/
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if (global_ctrl & CXL_HDM_DECODER_ENABLE || (!hdm && info->mem_enabled))
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return devm_cxl_enable_mem(&port->dev, cxlds);
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else if (!hdm)
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/*
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* If the HDM Decoder Capability does not exist and DVSEC was
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* not setup, the DVSEC based emulation cannot be used.
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*/
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if (!hdm)
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return -ENODEV;
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/* The HDM Decoder Capability exists but is globally disabled. */
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/*
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* If the DVSEC CXL Range registers are not enabled, just
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* enable and use the HDM Decoder Capability registers.
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*/
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if (!info->mem_enabled) {
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rc = devm_cxl_enable_hdm(&port->dev, cxlhdm);
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if (rc)
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return rc;
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return devm_cxl_enable_mem(&port->dev, cxlds);
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}
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/*
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* Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base
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* [High,Low] when HDM operation is enabled the range register values
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* are ignored by the device, but the spec also recommends matching the
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* DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges
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* are expected even though Linux does not require or maintain that
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* match. Check if at least one DVSEC range is enabled and allowed by
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* the platform. That is, the DVSEC range must be covered by a locked
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* platform window (CFMWS). Fail otherwise as the endpoint's decoders
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* cannot be used.
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*/
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root = to_cxl_port(port->dev.parent);
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while (!is_cxl_root(root) && is_cxl_port(root->dev.parent))
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root = to_cxl_port(root->dev.parent);
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@ -426,14 +457,6 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
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return -ENODEV;
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}
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if (!info->mem_enabled) {
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rc = devm_cxl_enable_hdm(&port->dev, cxlhdm);
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if (rc)
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return rc;
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return devm_cxl_enable_mem(&port->dev, cxlds);
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}
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for (i = 0, allowed = 0; i < info->ranges; i++) {
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struct device *cxld_dev;
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@ -453,15 +476,6 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
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return -ENXIO;
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}
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/*
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* Per CXL 2.0 Section 8.1.3.8.3 and 8.1.3.8.4 DVSEC CXL Range 1 Base
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* [High,Low] when HDM operation is enabled the range register values
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* are ignored by the device, but the spec also recommends matching the
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* DVSEC Range 1,2 to HDM Decoder Range 0,1. So, non-zero info->ranges
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* are expected even though Linux does not require or maintain that
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* match. If at least one DVSEC range is enabled and allowed, skip HDM
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* Decoder Capability Enable.
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*/
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return 0;
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}
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EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, "CXL");
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|
|
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|
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@ -602,17 +602,19 @@ struct cxl_port *to_cxl_port(const struct device *dev)
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}
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EXPORT_SYMBOL_NS_GPL(to_cxl_port, "CXL");
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struct cxl_port *parent_port_of(struct cxl_port *port)
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{
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if (!port || !port->parent_dport)
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return NULL;
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return port->parent_dport->port;
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}
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static void unregister_port(void *_port)
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{
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struct cxl_port *port = _port;
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struct cxl_port *parent;
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struct cxl_port *parent = parent_port_of(port);
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struct device *lock_dev;
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if (is_cxl_root(port))
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parent = NULL;
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else
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parent = to_cxl_port(port->dev.parent);
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/*
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* CXL root port's and the first level of ports are unregistered
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* under the platform firmware device lock, all other ports are
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@ -1035,15 +1037,6 @@ struct cxl_root *find_cxl_root(struct cxl_port *port)
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}
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EXPORT_SYMBOL_NS_GPL(find_cxl_root, "CXL");
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void put_cxl_root(struct cxl_root *cxl_root)
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{
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if (!cxl_root)
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return;
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put_device(&cxl_root->port.dev);
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}
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EXPORT_SYMBOL_NS_GPL(put_cxl_root, "CXL");
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static struct cxl_dport *find_dport(struct cxl_port *port, int id)
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{
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struct cxl_dport *dport;
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@ -231,11 +231,10 @@ static int cxl_region_invalidate_memregion(struct cxl_region *cxlr)
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&cxlr->dev,
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"Bypassing cpu_cache_invalidate_memregion() for testing!\n");
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return 0;
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} else {
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dev_WARN(&cxlr->dev,
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"Failed to synchronize CPU cache state\n");
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return -ENXIO;
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}
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dev_WARN(&cxlr->dev,
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"Failed to synchronize CPU cache state\n");
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return -ENXIO;
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}
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cpu_cache_invalidate_memregion(IORES_DESC_CXL);
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@ -865,10 +864,23 @@ static int match_auto_decoder(struct device *dev, const void *data)
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return 0;
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}
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/**
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* cxl_port_pick_region_decoder() - assign or lookup a decoder for a region
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* @port: a port in the ancestry of the endpoint implied by @cxled
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* @cxled: endpoint decoder to be, or currently, mapped by @port
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* @cxlr: region to establish, or validate, decode @port
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*
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* In the region creation path cxl_port_pick_region_decoder() is an
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* allocator to find a free port. In the region assembly path, it is
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* recalling the decoder that platform firmware picked for validation
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* purposes.
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*
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* The result is recorded in a 'struct cxl_region_ref' in @port.
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*/
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static struct cxl_decoder *
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cxl_region_find_decoder(struct cxl_port *port,
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struct cxl_endpoint_decoder *cxled,
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struct cxl_region *cxlr)
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cxl_port_pick_region_decoder(struct cxl_port *port,
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struct cxl_endpoint_decoder *cxled,
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struct cxl_region *cxlr)
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{
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struct device *dev;
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@ -916,7 +928,8 @@ static bool auto_order_ok(struct cxl_port *port, struct cxl_region *cxlr_iter,
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static struct cxl_region_ref *
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alloc_region_ref(struct cxl_port *port, struct cxl_region *cxlr,
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struct cxl_endpoint_decoder *cxled)
|
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struct cxl_endpoint_decoder *cxled,
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struct cxl_decoder *cxld)
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{
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struct cxl_region_params *p = &cxlr->params;
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struct cxl_region_ref *cxl_rr, *iter;
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|
|
@ -930,9 +943,6 @@ alloc_region_ref(struct cxl_port *port, struct cxl_region *cxlr,
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continue;
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|
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if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
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struct cxl_decoder *cxld;
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|
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cxld = cxl_region_find_decoder(port, cxled, cxlr);
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if (auto_order_ok(port, iter->region, cxld))
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continue;
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}
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|
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@ -1014,19 +1024,11 @@ static int cxl_rr_ep_add(struct cxl_region_ref *cxl_rr,
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return 0;
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}
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static int cxl_rr_alloc_decoder(struct cxl_port *port, struct cxl_region *cxlr,
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struct cxl_endpoint_decoder *cxled,
|
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struct cxl_region_ref *cxl_rr)
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static int cxl_rr_assign_decoder(struct cxl_port *port, struct cxl_region *cxlr,
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struct cxl_endpoint_decoder *cxled,
|
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struct cxl_region_ref *cxl_rr,
|
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struct cxl_decoder *cxld)
|
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{
|
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struct cxl_decoder *cxld;
|
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|
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cxld = cxl_region_find_decoder(port, cxled, cxlr);
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if (!cxld) {
|
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dev_dbg(&cxlr->dev, "%s: no decoder available\n",
|
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dev_name(&port->dev));
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return -EBUSY;
|
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}
|
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|
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if (cxld->region) {
|
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dev_dbg(&cxlr->dev, "%s: %s already attached to %s\n",
|
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dev_name(&port->dev), dev_name(&cxld->dev),
|
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|
|
@ -1117,7 +1119,16 @@ static int cxl_port_attach_region(struct cxl_port *port,
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nr_targets_inc = true;
|
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}
|
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} else {
|
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cxl_rr = alloc_region_ref(port, cxlr, cxled);
|
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struct cxl_decoder *cxld;
|
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|
||||
cxld = cxl_port_pick_region_decoder(port, cxled, cxlr);
|
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if (!cxld) {
|
||||
dev_dbg(&cxlr->dev, "%s: no decoder available\n",
|
||||
dev_name(&port->dev));
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
cxl_rr = alloc_region_ref(port, cxlr, cxled, cxld);
|
||||
if (IS_ERR(cxl_rr)) {
|
||||
dev_dbg(&cxlr->dev,
|
||||
"%s: failed to allocate region reference\n",
|
||||
|
|
@ -1126,7 +1137,7 @@ static int cxl_port_attach_region(struct cxl_port *port,
|
|||
}
|
||||
nr_targets_inc = true;
|
||||
|
||||
rc = cxl_rr_alloc_decoder(port, cxlr, cxled, cxl_rr);
|
||||
rc = cxl_rr_assign_decoder(port, cxlr, cxled, cxl_rr, cxld);
|
||||
if (rc)
|
||||
goto out_erase;
|
||||
}
|
||||
|
|
@ -1748,13 +1759,6 @@ static int cmp_interleave_pos(const void *a, const void *b)
|
|||
return cxled_a->pos - cxled_b->pos;
|
||||
}
|
||||
|
||||
static struct cxl_port *next_port(struct cxl_port *port)
|
||||
{
|
||||
if (!port->parent_dport)
|
||||
return NULL;
|
||||
return port->parent_dport->port;
|
||||
}
|
||||
|
||||
static int match_switch_decoder_by_range(struct device *dev,
|
||||
const void *data)
|
||||
{
|
||||
|
|
@ -1781,7 +1785,7 @@ static int find_pos_and_ways(struct cxl_port *port, struct range *range,
|
|||
struct device *dev;
|
||||
int rc = -ENXIO;
|
||||
|
||||
parent = next_port(port);
|
||||
parent = parent_port_of(port);
|
||||
if (!parent)
|
||||
return rc;
|
||||
|
||||
|
|
@ -1805,6 +1809,13 @@ static int find_pos_and_ways(struct cxl_port *port, struct range *range,
|
|||
}
|
||||
put_device(dev);
|
||||
|
||||
if (rc)
|
||||
dev_err(port->uport_dev,
|
||||
"failed to find %s:%s in target list of %s\n",
|
||||
dev_name(&port->dev),
|
||||
dev_name(port->parent_dport->dport_dev),
|
||||
dev_name(&cxlsd->cxld.dev));
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
|
@ -1861,7 +1872,7 @@ static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled)
|
|||
*/
|
||||
|
||||
/* Iterate from endpoint to root_port refining the position */
|
||||
for (iter = port; iter; iter = next_port(iter)) {
|
||||
for (iter = port; iter; iter = parent_port_of(iter)) {
|
||||
if (is_cxl_root(iter))
|
||||
break;
|
||||
|
||||
|
|
@ -1940,7 +1951,9 @@ static int cxl_region_attach(struct cxl_region *cxlr,
|
|||
if (p->state > CXL_CONFIG_INTERLEAVE_ACTIVE) {
|
||||
dev_dbg(&cxlr->dev, "region already active\n");
|
||||
return -EBUSY;
|
||||
} else if (p->state < CXL_CONFIG_INTERLEAVE_ACTIVE) {
|
||||
}
|
||||
|
||||
if (p->state < CXL_CONFIG_INTERLEAVE_ACTIVE) {
|
||||
dev_dbg(&cxlr->dev, "interleave config missing\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
|
@ -2160,6 +2173,12 @@ static int attach_target(struct cxl_region *cxlr,
|
|||
rc = cxl_region_attach(cxlr, cxled, pos);
|
||||
up_read(&cxl_dpa_rwsem);
|
||||
up_write(&cxl_region_rwsem);
|
||||
|
||||
if (rc)
|
||||
dev_warn(cxled->cxld.dev.parent,
|
||||
"failed to attach %s to %s: %d\n",
|
||||
dev_name(&cxled->cxld.dev), dev_name(&cxlr->dev), rc);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
|
@ -3196,20 +3215,49 @@ static int devm_cxl_add_dax_region(struct cxl_region *cxlr)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int match_root_decoder_by_range(struct device *dev,
|
||||
const void *data)
|
||||
static int match_decoder_by_range(struct device *dev, const void *data)
|
||||
{
|
||||
const struct range *r1, *r2 = data;
|
||||
struct cxl_root_decoder *cxlrd;
|
||||
struct cxl_decoder *cxld;
|
||||
|
||||
if (!is_root_decoder(dev))
|
||||
if (!is_switch_decoder(dev))
|
||||
return 0;
|
||||
|
||||
cxlrd = to_cxl_root_decoder(dev);
|
||||
r1 = &cxlrd->cxlsd.cxld.hpa_range;
|
||||
cxld = to_cxl_decoder(dev);
|
||||
r1 = &cxld->hpa_range;
|
||||
return range_contains(r1, r2);
|
||||
}
|
||||
|
||||
static struct cxl_decoder *
|
||||
cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa)
|
||||
{
|
||||
struct device *cxld_dev = device_find_child(&port->dev, hpa,
|
||||
match_decoder_by_range);
|
||||
|
||||
return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL;
|
||||
}
|
||||
|
||||
static struct cxl_root_decoder *
|
||||
cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled)
|
||||
{
|
||||
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
|
||||
struct cxl_port *port = cxled_to_port(cxled);
|
||||
struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
|
||||
struct cxl_decoder *root, *cxld = &cxled->cxld;
|
||||
struct range *hpa = &cxld->hpa_range;
|
||||
|
||||
root = cxl_port_find_switch_decoder(&cxl_root->port, hpa);
|
||||
if (!root) {
|
||||
dev_err(cxlmd->dev.parent,
|
||||
"%s:%s no CXL window for range %#llx:%#llx\n",
|
||||
dev_name(&cxlmd->dev), dev_name(&cxld->dev),
|
||||
cxld->hpa_range.start, cxld->hpa_range.end);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return to_cxl_root_decoder(&root->dev);
|
||||
}
|
||||
|
||||
static int match_region_by_range(struct device *dev, const void *data)
|
||||
{
|
||||
struct cxl_region_params *p;
|
||||
|
|
@ -3376,47 +3424,45 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
|
|||
return cxlr;
|
||||
}
|
||||
|
||||
int cxl_add_to_region(struct cxl_port *root, struct cxl_endpoint_decoder *cxled)
|
||||
static struct cxl_region *
|
||||
cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *hpa)
|
||||
{
|
||||
struct device *region_dev;
|
||||
|
||||
region_dev = device_find_child(&cxlrd->cxlsd.cxld.dev, hpa,
|
||||
match_region_by_range);
|
||||
if (!region_dev)
|
||||
return NULL;
|
||||
|
||||
return to_cxl_region(region_dev);
|
||||
}
|
||||
|
||||
int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
|
||||
{
|
||||
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
|
||||
struct range *hpa = &cxled->cxld.hpa_range;
|
||||
struct cxl_decoder *cxld = &cxled->cxld;
|
||||
struct device *cxlrd_dev, *region_dev;
|
||||
struct cxl_root_decoder *cxlrd;
|
||||
struct cxl_region_params *p;
|
||||
struct cxl_region *cxlr;
|
||||
bool attach = false;
|
||||
int rc;
|
||||
|
||||
cxlrd_dev = device_find_child(&root->dev, &cxld->hpa_range,
|
||||
match_root_decoder_by_range);
|
||||
if (!cxlrd_dev) {
|
||||
dev_err(cxlmd->dev.parent,
|
||||
"%s:%s no CXL window for range %#llx:%#llx\n",
|
||||
dev_name(&cxlmd->dev), dev_name(&cxld->dev),
|
||||
cxld->hpa_range.start, cxld->hpa_range.end);
|
||||
struct cxl_root_decoder *cxlrd __free(put_cxl_root_decoder) =
|
||||
cxl_find_root_decoder(cxled);
|
||||
if (!cxlrd)
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
cxlrd = to_cxl_root_decoder(cxlrd_dev);
|
||||
|
||||
/*
|
||||
* Ensure that if multiple threads race to construct_region() for @hpa
|
||||
* one does the construction and the others add to that.
|
||||
*/
|
||||
mutex_lock(&cxlrd->range_lock);
|
||||
region_dev = device_find_child(&cxlrd->cxlsd.cxld.dev, hpa,
|
||||
match_region_by_range);
|
||||
if (!region_dev) {
|
||||
struct cxl_region *cxlr __free(put_cxl_region) =
|
||||
cxl_find_region_by_range(cxlrd, hpa);
|
||||
if (!cxlr)
|
||||
cxlr = construct_region(cxlrd, cxled);
|
||||
region_dev = &cxlr->dev;
|
||||
} else
|
||||
cxlr = to_cxl_region(region_dev);
|
||||
mutex_unlock(&cxlrd->range_lock);
|
||||
|
||||
rc = PTR_ERR_OR_ZERO(cxlr);
|
||||
if (rc)
|
||||
goto out;
|
||||
return rc;
|
||||
|
||||
attach_target(cxlr, cxled, -1, TASK_UNINTERRUPTIBLE);
|
||||
|
||||
|
|
@ -3436,9 +3482,6 @@ int cxl_add_to_region(struct cxl_port *root, struct cxl_endpoint_decoder *cxled)
|
|||
p->res);
|
||||
}
|
||||
|
||||
put_device(region_dev);
|
||||
out:
|
||||
put_device(cxlrd_dev);
|
||||
return rc;
|
||||
}
|
||||
EXPORT_SYMBOL_NS_GPL(cxl_add_to_region, "CXL");
|
||||
|
|
|
|||
|
|
@ -724,6 +724,7 @@ static inline bool is_cxl_root(struct cxl_port *port)
|
|||
int cxl_num_decoders_committed(struct cxl_port *port);
|
||||
bool is_cxl_port(const struct device *dev);
|
||||
struct cxl_port *to_cxl_port(const struct device *dev);
|
||||
struct cxl_port *parent_port_of(struct cxl_port *port);
|
||||
void cxl_port_commit_reap(struct cxl_decoder *cxld);
|
||||
struct pci_bus;
|
||||
int devm_cxl_register_pci_bus(struct device *host, struct device *uport_dev,
|
||||
|
|
@ -736,10 +737,12 @@ struct cxl_port *devm_cxl_add_port(struct device *host,
|
|||
struct cxl_root *devm_cxl_add_root(struct device *host,
|
||||
const struct cxl_root_ops *ops);
|
||||
struct cxl_root *find_cxl_root(struct cxl_port *port);
|
||||
void put_cxl_root(struct cxl_root *cxl_root);
|
||||
DEFINE_FREE(put_cxl_root, struct cxl_root *, if (_T) put_cxl_root(_T))
|
||||
|
||||
DEFINE_FREE(put_cxl_root, struct cxl_root *, if (_T) put_device(&_T->port.dev))
|
||||
DEFINE_FREE(put_cxl_port, struct cxl_port *, if (!IS_ERR_OR_NULL(_T)) put_device(&_T->dev))
|
||||
DEFINE_FREE(put_cxl_root_decoder, struct cxl_root_decoder *, if (!IS_ERR_OR_NULL(_T)) put_device(&_T->cxlsd.cxld.dev))
|
||||
DEFINE_FREE(put_cxl_region, struct cxl_region *, if (!IS_ERR_OR_NULL(_T)) put_device(&_T->dev))
|
||||
|
||||
int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd);
|
||||
void cxl_bus_rescan(void);
|
||||
void cxl_bus_drain(void);
|
||||
|
|
@ -856,8 +859,7 @@ struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port);
|
|||
#ifdef CONFIG_CXL_REGION
|
||||
bool is_cxl_pmem_region(struct device *dev);
|
||||
struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev);
|
||||
int cxl_add_to_region(struct cxl_port *root,
|
||||
struct cxl_endpoint_decoder *cxled);
|
||||
int cxl_add_to_region(struct cxl_endpoint_decoder *cxled);
|
||||
struct cxl_dax_region *to_cxl_dax_region(struct device *dev);
|
||||
u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa);
|
||||
#else
|
||||
|
|
@ -869,8 +871,7 @@ static inline struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
|
|||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline int cxl_add_to_region(struct cxl_port *root,
|
||||
struct cxl_endpoint_decoder *cxled)
|
||||
static inline int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ static void schedule_detach(void *cxlmd)
|
|||
schedule_cxl_memdev_detach(cxlmd);
|
||||
}
|
||||
|
||||
static int discover_region(struct device *dev, void *root)
|
||||
static int discover_region(struct device *dev, void *unused)
|
||||
{
|
||||
struct cxl_endpoint_decoder *cxled;
|
||||
int rc;
|
||||
|
|
@ -49,7 +49,7 @@ static int discover_region(struct device *dev, void *root)
|
|||
* Region enumeration is opportunistic, if this add-event fails,
|
||||
* continue to the next endpoint decoder.
|
||||
*/
|
||||
rc = cxl_add_to_region(root, cxled);
|
||||
rc = cxl_add_to_region(cxled);
|
||||
if (rc)
|
||||
dev_dbg(dev, "failed to add to region: %#llx-%#llx\n",
|
||||
cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end);
|
||||
|
|
@ -95,7 +95,6 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
|
|||
struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
|
||||
struct cxl_dev_state *cxlds = cxlmd->cxlds;
|
||||
struct cxl_hdm *cxlhdm;
|
||||
struct cxl_port *root;
|
||||
int rc;
|
||||
|
||||
rc = cxl_dvsec_rr_decode(cxlds, &info);
|
||||
|
|
@ -126,19 +125,11 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
|
|||
if (rc)
|
||||
return rc;
|
||||
|
||||
/*
|
||||
* This can't fail in practice as CXL root exit unregisters all
|
||||
* descendant ports and that in turn synchronizes with cxl_port_probe()
|
||||
*/
|
||||
struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
|
||||
|
||||
root = &cxl_root->port;
|
||||
|
||||
/*
|
||||
* Now that all endpoint decoders are successfully enumerated, try to
|
||||
* assemble regions from committed decoders
|
||||
*/
|
||||
device_for_each_child(&port->dev, root, discover_region);
|
||||
device_for_each_child(&port->dev, NULL, discover_region);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user