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dma: fsl_raid: keep MMIO bases as void __iomem and cast at access

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The fsl_re_ctrl and fsl_re_chan_cfg structures describe memory-mapped
RAID Engine registers accessed only via ioread32be()/iowrite32be(), yet
the pointers to them (re_regs in struct fsl_re_drv_private, and jrregs
in struct fsl_re_chan) were not __iomem-qualified, so sparse emitted
"different address spaces" warnings for every register access.

Store both MMIO bases as a plain void __iomem * and derive jrregs with
void __iomem * arithmetic from re_regs, rather than carrying typed
register struct pointers through the driver. Each function that touches
the registers introduces a local typed pointer (struct fsl_re_ctrl
__iomem *ctrl) and uses ->field, which is the idiomatic kernel pattern
 and keeps the registers' __iomem qualification intact.

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202008111749.yy85rFMD%25lkp@intel.com/
Assisted-by: opencode:hy3-free
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260716202949.677290-4-rosenp@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Rosen Penev 2026-07-16 13:29:48 -07:00 committed by Vinod Koul
parent 416e9fd205
commit 68b7fbc235
2 changed files with 12 additions and 11 deletions
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19
drivers/dma/fsl_raid.c
View File

@ -657,8 +657,7 @@ static int fsl_re_chan_probe(struct platform_device *ofdev,
goto err_free;
}
chan->jrregs = (struct fsl_re_chan_cfg *)((u8 *)re_priv->re_regs +
off + ptr);
chan->jrregs = re_priv->base + off + ptr;
/* read irq property from dts */
chan->irq = irq_of_parse_and_map(np, 0);
@ -746,6 +745,7 @@ static int fsl_re_chan_probe(struct platform_device *ofdev,
/* Probe function for RAID Engine */
static int fsl_re_probe(struct platform_device *ofdev)
{
struct fsl_re_ctrl __iomem *re_regs;
struct fsl_re_drv_private *re_priv;
struct device_node *child;
u32 off;
@ -764,20 +764,21 @@ static int fsl_re_probe(struct platform_device *ofdev)
return -ENODEV;
/* IOMAP the entire RAID Engine region */
re_priv->re_regs = devm_ioremap(dev, res->start, resource_size(res));
if (!re_priv->re_regs)
re_regs = devm_ioremap(dev, res->start, resource_size(res));
if (!re_regs)
return -EBUSY;
re_priv->base = re_regs;
/* Program the RE mode */
out_be32(&re_priv->re_regs->global_config, FSL_RE_NON_DPAA_MODE);
out_be32(&re_regs->global_config, FSL_RE_NON_DPAA_MODE);
/* Program Galois Field polynomial */
out_be32(&re_priv->re_regs->galois_field_config, FSL_RE_GFM_POLY);
out_be32(&re_regs->galois_field_config, FSL_RE_GFM_POLY);
dev_info(dev, "version %x, mode %x, gfp %x\n",
in_be32(&re_priv->re_regs->re_version_id),
in_be32(&re_priv->re_regs->global_config),
in_be32(&re_priv->re_regs->galois_field_config));
in_be32(&re_regs->re_version_id),
in_be32(&re_regs->global_config),
in_be32(&re_regs->galois_field_config));
dma_dev = &re_priv->dma_dev;
dma_dev->dev = dev;

4
drivers/dma/fsl_raid.h
View File

@ -256,7 +256,7 @@ struct fsl_re_hw_desc {
struct fsl_re_drv_private {
u8 total_chans;
struct dma_device dma_dev;
struct fsl_re_ctrl *re_regs;
void __iomem *base;
struct fsl_re_chan *re_jrs[FSL_RE_MAX_CHANS];
struct dma_pool *cf_desc_pool;
struct dma_pool *hw_desc_pool;
@ -273,7 +273,7 @@ struct fsl_re_chan {
struct device *dev;
struct fsl_re_drv_private *re_dev;
struct dma_chan chan;
struct fsl_re_chan_cfg *jrregs;
struct fsl_re_chan_cfg __iomem *jrregs;
int irq;
struct tasklet_struct irqtask;
u32 alloc_count;