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drm/i915/cx0: Add MTL+ .get_hw_state hook

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Add .get_hw_state hook to MTL+ platforms for dpll framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-26-mika.kahola@intel.com
This commit is contained in:
Mika Kahola 2025-11-17 12:45:55 +02:00
parent 9b5f839e14
commit 685f365349
3 changed files with 37 additions and 3 deletions
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9
drivers/gpu/drm/i915/display/intel_cx0_phy.c
View File

@ -3594,19 +3594,24 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
return ICL_PORT_DPLL_DEFAULT;
}
void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
bool intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
struct intel_cx0pll_state *pll_state)
{
memset(pll_state, 0, sizeof(*pll_state));
pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder));
if (pll_state->tbt_mode)
return;
return true;
if (!intel_cx0_pll_is_enabled(encoder))
return false;
if (intel_encoder_is_c10phy(encoder))
intel_c10pll_readout_hw_state(encoder, pll_state);
else
intel_c20pll_readout_hw_state(encoder, pll_state);
return true;
}
static bool mtl_compare_hw_state_c10(const struct intel_c10pll_state *a,

2
drivers/gpu/drm/i915/display/intel_cx0_phy.h
View File

@ -37,7 +37,7 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
int intel_cx0pll_calc_state(const struct intel_crtc_state *crtc_state,
struct intel_encoder *encoder,
struct intel_dpll_hw_state *hw_state);
void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
bool intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
struct intel_cx0pll_state *pll_state);
int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder,
const struct intel_cx0pll_state *pll_state);

29
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
View File

@ -4351,7 +4351,36 @@ static const struct intel_dpll_mgr adlp_pll_mgr = {
.compare_hw_state = icl_compare_hw_state,
};
static struct intel_encoder *get_intel_encoder(struct intel_display *display,
const struct intel_dpll *pll)
{
struct intel_encoder *encoder;
enum intel_dpll_id mtl_id;
for_each_intel_encoder(display->drm, encoder) {
mtl_id = mtl_port_to_pll_id(display, encoder->port);
if (mtl_id == pll->info->id)
return encoder;
}
return NULL;
}
static bool mtl_pll_get_hw_state(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct intel_encoder *encoder = get_intel_encoder(display, pll);
if (!encoder)
return false;
return intel_cx0pll_readout_hw_state(encoder, &dpll_hw_state->cx0pll);
}
static const struct intel_dpll_funcs mtl_pll_funcs = {
.get_hw_state = mtl_pll_get_hw_state,
};
static const struct dpll_info mtl_plls[] = {