drm/nouveau/gsp: add channel class id to gpu hal

Use channel class ID from nvkm_rm_gpu, instead of copying it from the
non-GSP HALs.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Tested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c

@@ -18,4 +18,8 @@ ad10x_gpu = {
 	},
 
 	.usermode.class = AMPERE_USERMODE_A,
+
+	.fifo.chan = {
+		.class = AMPERE_CHANNEL_GPFIFO_A,
+	},
 };

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c

@@ -9,4 +9,8 @@
 const struct nvkm_rm_gpu
 ga100_gpu = {
 	.usermode.class = AMPERE_USERMODE_A,
+
+	.fifo.chan = {
+		.class = AMPERE_CHANNEL_GPFIFO_A,
+	},
 };

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c

@@ -18,4 +18,8 @@ ga1xx_gpu = {
 	},
 
 	.usermode.class = AMPERE_USERMODE_A,
+
+	.fifo.chan = {
+		.class = AMPERE_CHANNEL_GPFIFO_A,
+	},
 };

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h

@@ -21,6 +21,12 @@ struct nvkm_rm_gpu {
 	struct {
 		u32 class;
 	} usermode;
+
+	struct {
+		struct {
+			u32 class;
+		} chan;
+	} fifo;
 };
 
 extern const struct nvkm_rm_gpu tu1xx_gpu;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c

@@ -31,6 +31,8 @@
 #include <subdev/vfn.h>
 #include <engine/gr.h>
 
+#include <rm/gpu.h>
+
 #include <nvhw/drf.h>
 
 #include "nvrm/fifo.h"
@@ -216,10 +218,6 @@ r535_chan = {
 	.doorbell_handle = r535_chan_doorbell_handle,
 };
 
-static const struct nvkm_cgrp_func
-r535_cgrp = {
-};
-
 static int
 r535_engn_nonstall(struct nvkm_engn *engn)
 {
@@ -522,6 +520,7 @@ int
 r535_fifo_new(const struct nvkm_fifo_func *hw, struct nvkm_device *device,
 	      enum nvkm_subdev_type type, int inst, struct nvkm_fifo **pfifo)
 {
+	const struct nvkm_rm_gpu *gpu = device->gsp->rm->gpu;
 	struct nvkm_fifo_func *rm;
 
 	if (!(rm = kzalloc(sizeof(*rm), GFP_KERNEL)))
@@ -530,9 +529,7 @@ r535_fifo_new(const struct nvkm_fifo_func *hw, struct nvkm_device *device,
 	rm->dtor = r535_fifo_dtor;
 	rm->runl_ctor = r535_fifo_runl_ctor;
 	rm->runl = &r535_runl;
-	rm->cgrp = hw->cgrp;
-	rm->cgrp.func = &r535_cgrp;
-	rm->chan = hw->chan;
+	rm->chan.user.oclass = gpu->fifo.chan.class;
 	rm->chan.func = &r535_chan;
 	rm->nonstall = &ga100_fifo_nonstall;
 	rm->nonstall_ctor = ga100_fifo_nonstall_ctor;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c

@@ -18,4 +18,8 @@ tu1xx_gpu = {
 	},
 
 	.usermode.class = TURING_USERMODE_A,
+
+	.fifo.chan = {
+		.class = TURING_CHANNEL_GPFIFO_A,
+	},
 };