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dt-bindings: gpio: Move fsl,mxs-pinctrl.txt into gpio-mxs.yaml
Move mxs-pinctrl part into gpio-mxs.yaml and add pinctrl examples to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/mxs/imx28-xea.dtb: pinctrl@80018000 (fsl,imx28-pinctrl): 'auart0-2pins@0', 'auart0@0', ... 'usb1@1' do not match any of the regexes: 'gpio@[0-9]+$', 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250820164946.3782702-1-Frank.Li@nxp.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Frank Li
Bartosz Golaszewski
parent
a16a3cb071
commit
66edbb1e32
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@ -18,9 +18,13 @@ description: |
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properties:
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compatible:
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enum:
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- fsl,imx23-pinctrl
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- fsl,imx28-pinctrl
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items:
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- enum:
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- fsl,imx23-pinctrl
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- fsl,imx28-pinctrl
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# Over 10 years old devices, driver use simple-bus to probe child gpio
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# Devices. Keep it as it to be compatible existed dts files.
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- const: simple-bus
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'#address-cells':
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const: 1
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@ -31,7 +35,65 @@ properties:
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maxItems: 1
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patternProperties:
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"gpio@[0-9]+$":
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"^(?!gpio@)[^@]+@[0-9]+$":
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type: object
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properties:
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fsl,pinmux-ids:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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An integer array. Each integer in the array specify a pin
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with given mux function, with bank, pin and mux packed as below.
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[15..12] : bank number
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[11..4] : pin number
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[3..0] : mux selection
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This integer with mux selection packed is used as an entity by both group
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and config nodes to identify a pin. The mux selection in the integer takes
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effects only on group node, and will get ignored by driver with config node,
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since config node is only meant to set up pin configurations.
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Valid values for these integers are listed below.
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reg:
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items:
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- description: |
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pin group index. NOTE: it is supposed wrong use reg property
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here. But it is over 10 years devices. Just keep it as it.
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fsl,drive-strength:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2, 3]
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description: |
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0: MXS_DRIVE_4mA
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1: MXS_DRIVE_8mA
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2: MXS_DRIVE_12mA
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3: MXS_DRIVE_16mA
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fsl,voltage:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: |
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0: MXS_VOLTAGE_LOW - 1.8 V
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1: MXS_VOLTAGE_HIGH - 3.3 V
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fsl,pull-up:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: |
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0: MXS_PULL_DISABLE - Disable the internal pull-up
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1: MXS_PULL_ENABLE - Enable the internal pull-up
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Note that when enabling the pull-up, the internal pad keeper gets disabled.
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Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
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will only disable the internal pad keeper.
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required:
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- fsl,pinmux-ids
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additionalProperties: false
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"^gpio@[0-9]+$":
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type: object
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properties:
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compatible:
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@ -80,7 +142,7 @@ examples:
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pinctrl@80018000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-pinctrl";
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compatible = "fsl,imx28-pinctrl", "simple-bus";
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reg = <0x80018000 0x2000>;
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gpio@0 {
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@ -132,4 +194,12 @@ examples:
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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lcdif-apx4@5 {
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reg = <5>;
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fsl,pinmux-ids = <0x1181 0x1191>;
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fsl,drive-strength = <0>;
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fsl,voltage = <0>;
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fsl,pull-up = <0>;
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};
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};
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@ -1,127 +0,0 @@
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* Freescale MXS Pin Controller
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The pins controlled by mxs pin controller are organized in banks, each bank
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has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th
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function is GPIO. The configuration on the pins includes drive strength,
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voltage and pull-up.
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Required properties:
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- compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
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- reg: Should contain the register physical address and length for the
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pin controller.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices.
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The node of mxs pin controller acts as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for
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a group of pins, and only affects those parameters that are explicitly listed.
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In other words, a subnode that describes a drive strength parameter implies no
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information about pull-up. For this reason, even seemingly boolean values are
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actually tristates in this binding: unspecified, off, or on. Unspecified is
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represented as an absent property, and off/on are represented as integer
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values 0 and 1.
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Those subnodes under mxs pin controller node will fall into two categories.
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One is to set up a group of pins for a function, both mux selection and pin
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configurations, and it's called group node in the binding document. The other
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one is to adjust the pin configuration for some particular pins that need a
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different configuration than what is defined in group node. The binding
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document calls this type of node config node.
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On mxs, there is no hardware pin group. The pin group in this binding only
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means a group of pins put together for particular peripheral to work in
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particular function, like SSP0 functioning as mmc0-8bit. That said, the
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group node should include all the pins needed for one function rather than
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having these pins defined in several group nodes. It also means each of
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"pinctrl-*" phandle in client device node should only have one group node
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pointed in there, while the phandle can have multiple config node referenced
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there to adjust configurations for some pins in the group.
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Required subnode-properties:
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- fsl,pinmux-ids: An integer array. Each integer in the array specify a pin
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with given mux function, with bank, pin and mux packed as below.
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[15..12] : bank number
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[11..4] : pin number
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[3..0] : mux selection
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This integer with mux selection packed is used as an entity by both group
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and config nodes to identify a pin. The mux selection in the integer takes
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effects only on group node, and will get ignored by driver with config node,
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since config node is only meant to set up pin configurations.
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Valid values for these integers are listed below.
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- reg: Should be the index of the group nodes for same function. This property
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is required only for group nodes, and should not be present in any config
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nodes.
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Optional subnode-properties:
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- fsl,drive-strength: Integer.
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0: MXS_DRIVE_4mA
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1: MXS_DRIVE_8mA
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2: MXS_DRIVE_12mA
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3: MXS_DRIVE_16mA
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- fsl,voltage: Integer.
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0: MXS_VOLTAGE_LOW - 1.8 V
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1: MXS_VOLTAGE_HIGH - 3.3 V
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- fsl,pull-up: Integer.
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0: MXS_PULL_DISABLE - Disable the internal pull-up
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1: MXS_PULL_ENABLE - Enable the internal pull-up
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Note that when enabling the pull-up, the internal pad keeper gets disabled.
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Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up
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will only disable the internal pad keeper.
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Examples:
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pinctrl@80018000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-pinctrl";
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reg = <0x80018000 2000>;
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mmc0_8bit_pins_a: mmc0-8bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX28_PAD_SSP0_DATA0__SSP0_D0
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MX28_PAD_SSP0_DATA1__SSP0_D1
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MX28_PAD_SSP0_DATA2__SSP0_D2
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MX28_PAD_SSP0_DATA3__SSP0_D3
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MX28_PAD_SSP0_DATA4__SSP0_D4
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MX28_PAD_SSP0_DATA5__SSP0_D5
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MX28_PAD_SSP0_DATA6__SSP0_D6
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MX28_PAD_SSP0_DATA7__SSP0_D7
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MX28_PAD_SSP0_CMD__SSP0_CMD
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MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
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MX28_PAD_SSP0_SCK__SSP0_SCK
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_ENABLE>;
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};
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mmc_cd_cfg: mmc-cd-cfg {
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fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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mmc_sck_cfg: mmc-sck-cfg {
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fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>;
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fsl,drive-strength = <MXS_DRIVE_12mA>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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};
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In this example, group node mmc0-8bit defines a group of pins for mxs SSP0
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to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations
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applied on all these pins. And config nodes mmc-cd-cfg and mmc-sck-cfg are
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adjusting the configuration for pins card-detection and clock from what group
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node mmc0-8bit defines. Only the configuration properties to be adjusted need
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to be listed in the config nodes.
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Valid values for i.MX28/i.MX23 pinmux-id are defined in
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arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h.
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The definitions for the padconfig properties can be found in
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arch/arm/boot/dts/mxs-pinfunc.h.
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