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drm/i915: Document which RING_FAULT bits apply to which platforms

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The RING_FAULT bits have change a bit over the years. Document
which platforms use which bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-5-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2025-02-12 01:19:32 +02:00 committed by Andi Shyti
parent f46fa84bdb
commit 66ec4c1ab1
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/i915/gt/intel_gt_regs.h
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@ -326,10 +326,10 @@
_RING_FAULT_REG_VCS, \
_RING_FAULT_REG_VECS, \
_RING_FAULT_REG_BCS))
#define RING_FAULT_ENGINE_ID_MASK REG_GENMASK(16, 12)
#define RING_FAULT_GTTSEL_MASK REG_BIT(11)
#define RING_FAULT_ENGINE_ID_MASK REG_GENMASK(16, 12) /* bdw+ */
#define RING_FAULT_GTTSEL_MASK REG_BIT(11) /* pre-bdw */
#define RING_FAULT_SRCID_MASK REG_GENMASK(10, 3)
#define RING_FAULT_FAULT_TYPE_MASK REG_GENMASK(2, 1)
#define RING_FAULT_FAULT_TYPE_MASK REG_GENMASK(2, 1) /* ivb+ */
#define RING_FAULT_VALID REG_BIT(0)
#define ERROR_GEN6 _MMIO(0x40a0)