perf/x86/intel/uncore: Add CBB PMON support for Diamond Rapids

On DMR, PMON units inside the Core Building Block (CBB) are enumerated
separately from those in the Integrated Memory and I/O Hub (IMH).

A new per-CBB MSR (0x710) is introduced for discovery table enumeration.

For counter control registers, the tid_en bit (bit 16) exists on CBO,
SBO, and Santa, but it is not used by any events.  Mark this bit as
reserved.

Similarly, disallow extended umask (bits 32–63) on Santa and sNCU.

Additionally, ignore broken SB2UCIE unit.

Signed-off-by: Zide Chen <zide.chen@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20251231224233.113839-6-zide.chen@intel.com
This commit is contained in:
Zide Chen 2025-12-31 14:42:22 -08:00 committed by Peter Zijlstra
parent 6daf2c35b8
commit 66e2075426
4 changed files with 54 additions and 3 deletions

View File

@ -1837,6 +1837,8 @@ static const struct uncore_plat_init dmr_uncore_init __initconst = {
.domain[0].base_is_pci = true,
.domain[0].discovery_base = DMR_UNCORE_DISCOVERY_TABLE_DEVICE,
.domain[0].units_ignore = dmr_uncore_imh_units_ignore,
.domain[1].discovery_base = CBB_UNCORE_DISCOVERY_MSR,
.domain[1].units_ignore = dmr_uncore_cbb_units_ignore,
};
static const struct uncore_plat_init generic_uncore_init __initconst = {

View File

@ -615,6 +615,7 @@ extern struct event_constraint uncore_constraint_empty;
extern int spr_uncore_units_ignore[];
extern int gnr_uncore_units_ignore[];
extern int dmr_uncore_imh_units_ignore[];
extern int dmr_uncore_cbb_units_ignore[];
/* uncore_snb.c */
int snb_uncore_pci_init(void);

View File

@ -2,6 +2,8 @@
/* Store the full address of the global discovery table */
#define UNCORE_DISCOVERY_MSR 0x201e
/* Base address of uncore perfmon discovery table for CBB domain */
#define CBB_UNCORE_DISCOVERY_MSR 0x710
/* Generic device ID of a discovery table device */
#define UNCORE_DISCOVERY_TABLE_DEVICE 0x09a7

View File

@ -6807,6 +6807,28 @@ static struct intel_uncore_type dmr_uncore_hamvf = {
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_cbo = {
.name = "cbo",
.event_mask_ext = DMR_HAMVF_EVENT_MASK_EXT,
.format_group = &dmr_sca_uncore_format_group,
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_santa = {
.name = "santa",
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_cncu = {
.name = "cncu",
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_sncu = {
.name = "sncu",
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_ula = {
.name = "ula",
.event_mask_ext = DMR_HAMVF_EVENT_MASK_EXT,
@ -6814,6 +6836,20 @@ static struct intel_uncore_type dmr_uncore_ula = {
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_dda = {
.name = "dda",
.event_mask_ext = DMR_HAMVF_EVENT_MASK_EXT,
.format_group = &dmr_sca_uncore_format_group,
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_sbo = {
.name = "sbo",
.event_mask_ext = DMR_HAMVF_EVENT_MASK_EXT,
.format_group = &dmr_sca_uncore_format_group,
.attr_update = uncore_alias_groups,
};
static struct intel_uncore_type dmr_uncore_ubr = {
.name = "ubr",
.event_mask_ext = DMR_HAMVF_EVENT_MASK_EXT,
@ -6902,10 +6938,15 @@ static struct intel_uncore_type *dmr_uncores[UNCORE_DMR_NUM_UNCORE_TYPES] = {
NULL, NULL, NULL,
NULL, NULL,
&dmr_uncore_hamvf,
NULL,
NULL, NULL, NULL,
&dmr_uncore_cbo,
&dmr_uncore_santa,
&dmr_uncore_cncu,
&dmr_uncore_sncu,
&dmr_uncore_ula,
NULL, NULL, NULL, NULL,
&dmr_uncore_dda,
NULL,
&dmr_uncore_sbo,
NULL,
NULL, NULL, NULL,
&dmr_uncore_ubr,
NULL,
@ -6923,6 +6964,11 @@ int dmr_uncore_imh_units_ignore[] = {
UNCORE_IGNORE_END
};
int dmr_uncore_cbb_units_ignore[] = {
0x25, /* SB2UCIE */
UNCORE_IGNORE_END
};
int dmr_uncore_pci_init(void)
{
uncore_pci_uncores = uncore_get_uncores(UNCORE_ACCESS_PCI, 0, NULL,