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dt-bindings: riscv: Add Nuclei UX900 compatibles

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The UX900 is a RISC-V core from Nuclei, used in the Anlogic DR1V90 SoC.
It features a 64-bit architecture and dual-issue, 9-stage pipeline, with
lots of optional extensions including V, K, Zc, and more.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Junhui Liu 2025-10-21 17:41:37 +08:00 committed by Conor Dooley
parent c86ee66e14
commit 66c2a3173c
1 changed files with 1 additions and 0 deletions
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Documentation/devicetree/bindings/riscv/cpus.yaml
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@ -48,6 +48,7 @@ properties:
- amd,mbv64
- andestech,ax45mp
- canaan,k210
- nuclei,ux900
- sifive,bullet0
- sifive,e5
- sifive,e7