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net: ethernet: ti: am65-cpsw: streamline RX queue creation and cleanup
Introduce am65_cpsw_create_rxqs() and am65_cpsw_destroy_rxqs() and use them. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://patch.msgid.link/20250117-am65-cpsw-streamline-v2-2-91a29c97e569@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Roger Quadros
Jakub Kicinski
parent
681eb2beb3
commit
66c1ae68a1
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@ -498,35 +498,61 @@ static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common);
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static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common);
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static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port);
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static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port);
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static inline void am65_cpsw_put_page(struct am65_cpsw_rx_flow *flow,
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struct page *page,
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bool allow_direct);
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static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);
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static void am65_cpsw_destroy_xdp_rxqs(struct am65_cpsw_common *common)
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static void am65_cpsw_destroy_rxq(struct am65_cpsw_common *common, int id)
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{
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struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
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struct am65_cpsw_rx_flow *flow;
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struct xdp_rxq_info *rxq;
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int id, port;
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int port;
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for (id = 0; id < common->rx_ch_num_flows; id++) {
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flow = &rx_chn->flows[id];
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flow = &rx_chn->flows[id];
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napi_disable(&flow->napi_rx);
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hrtimer_cancel(&flow->rx_hrtimer);
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k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, id, rx_chn,
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am65_cpsw_nuss_rx_cleanup, !!id);
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for (port = 0; port < common->port_num; port++) {
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if (!common->ports[port].ndev)
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continue;
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for (port = 0; port < common->port_num; port++) {
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if (!common->ports[port].ndev)
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continue;
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rxq = &common->ports[port].xdp_rxq[id];
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rxq = &common->ports[port].xdp_rxq[id];
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if (xdp_rxq_info_is_reg(rxq))
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xdp_rxq_info_unreg(rxq);
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}
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if (xdp_rxq_info_is_reg(rxq))
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xdp_rxq_info_unreg(rxq);
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}
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if (flow->page_pool) {
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page_pool_destroy(flow->page_pool);
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flow->page_pool = NULL;
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}
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if (flow->page_pool) {
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page_pool_destroy(flow->page_pool);
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flow->page_pool = NULL;
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}
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}
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static int am65_cpsw_create_xdp_rxqs(struct am65_cpsw_common *common)
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static void am65_cpsw_destroy_rxqs(struct am65_cpsw_common *common)
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{
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struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
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int id;
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reinit_completion(&common->tdown_complete);
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k3_udma_glue_tdown_rx_chn(rx_chn->rx_chn, true);
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if (common->pdata.quirks & AM64_CPSW_QUIRK_DMA_RX_TDOWN_IRQ) {
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id = wait_for_completion_timeout(&common->tdown_complete, msecs_to_jiffies(1000));
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if (!id)
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dev_err(common->dev, "rx teardown timeout\n");
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}
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for (id = common->rx_ch_num_flows - 1; id >= 0; id--)
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am65_cpsw_destroy_rxq(common, id);
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k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn);
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}
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static int am65_cpsw_create_rxq(struct am65_cpsw_common *common, int id)
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{
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struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
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struct page_pool_params pp_params = {
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@ -541,45 +567,92 @@ static int am65_cpsw_create_xdp_rxqs(struct am65_cpsw_common *common)
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struct am65_cpsw_rx_flow *flow;
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struct xdp_rxq_info *rxq;
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struct page_pool *pool;
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int id, port, ret;
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struct page *page;
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int port, ret, i;
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for (id = 0; id < common->rx_ch_num_flows; id++) {
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flow = &rx_chn->flows[id];
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pp_params.napi = &flow->napi_rx;
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pool = page_pool_create(&pp_params);
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if (IS_ERR(pool)) {
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ret = PTR_ERR(pool);
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flow = &rx_chn->flows[id];
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pp_params.napi = &flow->napi_rx;
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pool = page_pool_create(&pp_params);
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if (IS_ERR(pool)) {
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ret = PTR_ERR(pool);
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return ret;
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}
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flow->page_pool = pool;
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/* using same page pool is allowed as no running rx handlers
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* simultaneously for both ndevs
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*/
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for (port = 0; port < common->port_num; port++) {
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if (!common->ports[port].ndev)
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/* FIXME should we BUG here? */
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continue;
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rxq = &common->ports[port].xdp_rxq[id];
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ret = xdp_rxq_info_reg(rxq, common->ports[port].ndev,
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id, flow->napi_rx.napi_id);
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if (ret)
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goto err;
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ret = xdp_rxq_info_reg_mem_model(rxq,
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MEM_TYPE_PAGE_POOL,
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pool);
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if (ret)
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goto err;
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}
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for (i = 0; i < AM65_CPSW_MAX_RX_DESC; i++) {
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page = page_pool_dev_alloc_pages(flow->page_pool);
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if (!page) {
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dev_err(common->dev, "cannot allocate page in flow %d\n",
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id);
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ret = -ENOMEM;
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goto err;
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}
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flow->page_pool = pool;
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/* using same page pool is allowed as no running rx handlers
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* simultaneously for both ndevs
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*/
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for (port = 0; port < common->port_num; port++) {
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if (!common->ports[port].ndev)
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continue;
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rxq = &common->ports[port].xdp_rxq[id];
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ret = xdp_rxq_info_reg(rxq, common->ports[port].ndev,
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id, flow->napi_rx.napi_id);
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if (ret)
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goto err;
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ret = xdp_rxq_info_reg_mem_model(rxq,
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MEM_TYPE_PAGE_POOL,
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pool);
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if (ret)
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goto err;
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ret = am65_cpsw_nuss_rx_push(common, page, id);
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if (ret < 0) {
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dev_err(common->dev,
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"cannot submit page to rx channel flow %d, error %d\n",
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id, ret);
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am65_cpsw_put_page(flow, page, false);
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goto err;
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}
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}
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napi_enable(&flow->napi_rx);
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return 0;
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err:
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am65_cpsw_destroy_rxq(common, id);
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return ret;
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}
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static int am65_cpsw_create_rxqs(struct am65_cpsw_common *common)
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{
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int id, ret;
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for (id = 0; id < common->rx_ch_num_flows; id++) {
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ret = am65_cpsw_create_rxq(common, id);
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if (ret) {
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dev_err(common->dev, "couldn't create rxq %d: %d\n",
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id, ret);
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goto err;
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}
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}
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ret = k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn);
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if (ret) {
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dev_err(common->dev, "couldn't enable rx chn: %d\n", ret);
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goto err;
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}
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return 0;
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err:
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am65_cpsw_destroy_xdp_rxqs(common);
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for (--id; id >= 0; id--)
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am65_cpsw_destroy_rxq(common, id);
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return ret;
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}
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@ -643,7 +716,6 @@ static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)
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k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
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dma_unmap_single(rx_chn->dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);
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k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx);
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am65_cpsw_put_page(&rx_chn->flows[flow_id], page, false);
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}
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@ -718,12 +790,9 @@ static struct sk_buff *am65_cpsw_build_skb(void *page_addr,
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static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)
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{
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struct am65_cpsw_host *host_p = am65_common_get_host(common);
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struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
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struct am65_cpsw_tx_chn *tx_chn = common->tx_chns;
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int port_idx, i, ret, tx, flow_idx;
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struct am65_cpsw_rx_flow *flow;
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int port_idx, ret, tx;
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u32 val, port_mask;
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struct page *page;
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if (common->usage_count)
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return 0;
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@ -783,47 +852,9 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)
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am65_cpsw_qos_tx_p0_rate_init(common);
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ret = am65_cpsw_create_xdp_rxqs(common);
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if (ret) {
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dev_err(common->dev, "Failed to create XDP rx queues\n");
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ret = am65_cpsw_create_rxqs(common);
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if (ret)
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return ret;
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}
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for (flow_idx = 0; flow_idx < common->rx_ch_num_flows; flow_idx++) {
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flow = &rx_chn->flows[flow_idx];
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for (i = 0; i < AM65_CPSW_MAX_RX_DESC; i++) {
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page = page_pool_dev_alloc_pages(flow->page_pool);
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if (!page) {
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dev_err(common->dev, "cannot allocate page in flow %d\n",
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flow_idx);
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ret = -ENOMEM;
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goto fail_rx;
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}
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ret = am65_cpsw_nuss_rx_push(common, page, flow_idx);
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if (ret < 0) {
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dev_err(common->dev,
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"cannot submit page to rx channel flow %d, error %d\n",
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flow_idx, ret);
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am65_cpsw_put_page(flow, page, false);
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goto fail_rx;
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}
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}
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}
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ret = k3_udma_glue_enable_rx_chn(rx_chn->rx_chn);
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if (ret) {
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dev_err(common->dev, "couldn't enable rx chn: %d\n", ret);
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goto fail_rx;
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}
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for (i = 0; i < common->rx_ch_num_flows ; i++) {
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napi_enable(&rx_chn->flows[i].napi_rx);
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if (rx_chn->flows[i].irq_disabled) {
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rx_chn->flows[i].irq_disabled = false;
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enable_irq(rx_chn->flows[i].irq);
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}
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}
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for (tx = 0; tx < common->tx_ch_num; tx++) {
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ret = k3_udma_glue_enable_tx_chn(tx_chn[tx].tx_chn);
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@ -846,30 +877,13 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)
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tx--;
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}
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for (flow_idx = 0; i < common->rx_ch_num_flows; flow_idx++) {
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flow = &rx_chn->flows[flow_idx];
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if (!flow->irq_disabled) {
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disable_irq(flow->irq);
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flow->irq_disabled = true;
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}
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napi_disable(&flow->napi_rx);
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}
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k3_udma_glue_disable_rx_chn(rx_chn->rx_chn);
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fail_rx:
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for (i = 0; i < common->rx_ch_num_flows; i++)
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k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, rx_chn,
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am65_cpsw_nuss_rx_cleanup, !!i);
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am65_cpsw_destroy_xdp_rxqs(common);
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am65_cpsw_destroy_rxqs(common);
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return ret;
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}
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static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
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{
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struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns;
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struct am65_cpsw_tx_chn *tx_chn = common->tx_chns;
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int i;
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@ -903,31 +917,12 @@ static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)
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k3_udma_glue_disable_tx_chn(tx_chn[i].tx_chn);
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}
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reinit_completion(&common->tdown_complete);
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k3_udma_glue_tdown_rx_chn(rx_chn->rx_chn, true);
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if (common->pdata.quirks & AM64_CPSW_QUIRK_DMA_RX_TDOWN_IRQ) {
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i = wait_for_completion_timeout(&common->tdown_complete, msecs_to_jiffies(1000));
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if (!i)
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dev_err(common->dev, "rx teardown timeout\n");
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}
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for (i = common->rx_ch_num_flows - 1; i >= 0; i--) {
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napi_disable(&rx_chn->flows[i].napi_rx);
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hrtimer_cancel(&rx_chn->flows[i].rx_hrtimer);
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k3_udma_glue_reset_rx_chn(rx_chn->rx_chn, i, rx_chn,
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am65_cpsw_nuss_rx_cleanup, !!i);
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}
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k3_udma_glue_disable_rx_chn(rx_chn->rx_chn);
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am65_cpsw_destroy_rxqs(common);
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cpsw_ale_stop(common->ale);
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writel(0, common->cpsw_base + AM65_CPSW_REG_CTL);
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writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);
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am65_cpsw_destroy_xdp_rxqs(common);
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dev_dbg(common->dev, "cpsw_nuss stopped\n");
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return 0;
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}
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