From 7cf3e9bfc63db5a9b3e83cd5d26d11061e31afc5 Mon Sep 17 00:00:00 2001 From: Yangyu Chen Date: Tue, 30 Jul 2024 00:28:04 +0000 Subject: [PATCH 1/6] dt-bindings: vendor-prefixes: add spacemit Add new vendor strings to dt bindings for SpacemiT K1 SoC. Link: https://www.spacemit.com/en/spacemit-key-stone-2/ Signed-off-by: Yangyu Chen Acked-by: Conor Dooley Signed-off-by: Yixun Lan Acked-by: Palmer Dabbelt Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b320a39de7fe..848a7c67df1c 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1386,6 +1386,8 @@ patternProperties: description: Sophgo Technology Inc. "^sourceparts,.*": description: Source Parts Inc. + "^spacemit,.*": + description: SpacemiT (Hangzhou) Technology Co. Ltd "^spansion,.*": description: Spansion Inc. "^sparkfun,.*": From 5a5001d27065126d815eb54e12744b08322e3d31 Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Mon, 28 Oct 2024 16:25:49 +0800 Subject: [PATCH 2/6] riscv: dts: starfive: jh7110-common: revised device node Earlier this year a new DTSI file was created to define common properties for the StarFive VisionFive 2 and Milk-V Mars boards, both of which use the StarFive JH7110 SoC. The Pine64 Star64 board has also been added since that time. Some of the nodes defined in "jh7110-common.dtsi" are enabled in that file because all of the boards including it "want" them enabled. An upcoming patch enables another JH7110 board, but for that board not all of these common nodes should be enabled. Prepare for supporting the new board by avoiding enabling these nodes in "jh7110-common.dtsi", and enable them instead in these files: jh7110-milkv-mars.dts jh7110-pine64-star64.dts jh7110-starfive-visionfive-2.dtsi Signed-off-by: Alex Elder Signed-off-by: Guodong Xu Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- .../boot/dts/starfive/jh7110-common.dtsi | 5 ----- .../boot/dts/starfive/jh7110-milkv-mars.dts | 17 ++++++++++++++++ .../dts/starfive/jh7110-pine64-star64.dts | 17 ++++++++++++++++ .../jh7110-starfive-visionfive-2.dtsi | 20 +++++++++++++++++++ 4 files changed, 54 insertions(+), 5 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index c7771b3b6475..9e77f79ec162 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -176,7 +176,6 @@ csi2rx_to_camss: endpoint { &gmac0 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; - status = "okay"; mdio { #address-cells = <1>; @@ -196,7 +195,6 @@ &i2c0 { i2c-scl-falling-time-ns = <510>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; - status = "okay"; }; &i2c2 { @@ -311,7 +309,6 @@ &pcie1 { &pwmdac { pinctrl-names = "default"; pinctrl-0 = <&pwmdac_pins>; - status = "okay"; }; &qspi { @@ -350,13 +347,11 @@ uboot@100000 { &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm_pins>; - status = "okay"; }; &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; - status = "okay"; spi_dev0: spi@0 { compatible = "rohm,dh2228fv"; diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts index 5cb9e99e1dac..66ad3eb2fd66 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts @@ -15,6 +15,11 @@ &gmac0 { starfive,tx-use-rgmii-clk; assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; }; &pcie0 { @@ -35,3 +40,15 @@ &phy0 { rx-internal-delay-ps = <1500>; tx-internal-delay-ps = <1500>; }; + +&pwm { + status = "okay"; +}; + +&pwmdac { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts index b720cdd15ed6..dbc8612b8464 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts @@ -18,6 +18,7 @@ &gmac0 { starfive,tx-use-rgmii-clk; assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; + status = "okay"; }; &gmac1 { @@ -39,6 +40,10 @@ phy1: ethernet-phy@1 { }; }; +&i2c0 { + status = "okay"; +}; + &pcie1 { status = "okay"; }; @@ -63,3 +68,15 @@ &phy1 { motorcomm,tx-clk-10-inverted; motorcomm,tx-clk-100-inverted; }; + +&pwm { + status = "okay"; +}; + +&pwmdac { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 18f38fc790a4..ef93a394bb2f 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -13,6 +13,10 @@ aliases { }; }; +&gmac0 { + status = "okay"; +}; + &gmac1 { phy-handle = <&phy1>; phy-mode = "rgmii-id"; @@ -29,6 +33,10 @@ phy1: ethernet-phy@1 { }; }; +&i2c0 { + status = "okay"; +}; + &mmc0 { non-removable; }; @@ -40,3 +48,15 @@ &pcie0 { &pcie1 { status = "okay"; }; + +&pwm { + status = "okay"; +}; + +&pwmdac { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; From 817eac165ed487fc70de2facb1c588dcf29c3711 Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Mon, 28 Oct 2024 16:25:50 +0800 Subject: [PATCH 3/6] riscv: dts: starfive: jh7110-common: move usb0 config to board dts The JH7110 USB0 can operate as a dual-role USB device. Different boards can have different configuration. For all current boards this device operates in peripheral mode, but on a new board this operates in host mode. This property will no longer be common, so define the "dr_mode" property in the board files rather than in the common DTSI file. Signed-off-by: Alex Elder Signed-off-by: Guodong Xu Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 5 ----- arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts | 5 +++++ arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 5 +++++ .../boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 5 +++++ 4 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 9e77f79ec162..87ea81e9fed4 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -637,11 +637,6 @@ &uart0 { status = "okay"; }; -&usb0 { - dr_mode = "peripheral"; - status = "okay"; -}; - &U74_1 { cpu-supply = <&vdd_cpu>; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts index 66ad3eb2fd66..0d248b671d4b 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts @@ -52,3 +52,8 @@ &pwmdac { &spi0 { status = "okay"; }; + +&usb0 { + dr_mode = "peripheral"; + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts index dbc8612b8464..d5180c67ac55 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts @@ -80,3 +80,8 @@ &pwmdac { &spi0 { status = "okay"; }; + +&usb0 { + dr_mode = "peripheral"; + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index ef93a394bb2f..5f14afb2c24d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -60,3 +60,8 @@ &pwmdac { &spi0 { status = "okay"; }; + +&usb0 { + dr_mode = "peripheral"; + status = "okay"; +}; From e9b4ceedb5ae1037d1426993b9cb0643198f7bb7 Mon Sep 17 00:00:00 2001 From: Sandie Cao Date: Mon, 28 Oct 2024 16:25:51 +0800 Subject: [PATCH 4/6] dt-bindings: vendor: add deepcomputing Add "deepcomputing" to the Devicetree Vendor Prefix Registry. Signed-off-by: Sandie Cao Acked-by: Krzysztof Kozlowski [elder@riscstar.com: revised the description] Signed-off-by: Alex Elder Signed-off-by: Guodong Xu Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 848a7c67df1c..50921f369d62 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -356,6 +356,8 @@ patternProperties: description: DataImage, Inc. "^davicom,.*": description: DAVICOM Semiconductor, Inc. + "^deepcomputing,.*": + description: DeepComputing (HK) Limited "^dell,.*": description: Dell Inc. "^delta,.*": From e87fa39dbcb441e6a61df84557c777a1496df0cf Mon Sep 17 00:00:00 2001 From: Sandie Cao Date: Mon, 28 Oct 2024 16:25:52 +0800 Subject: [PATCH 5/6] dt-bindings: riscv: starfive: add deepcomputing,fml13v01 Add "deepcomputing,fml13v01" as a StarFive SoC-based board. The DeepComputing FML13V01 board incorporates a StarFive JH7110 SoC, and it's designed for the Framework Laptop 13 Chassis, which has (Framework) SKU FRANHQ0001. Signed-off-by: Sandie Cao Acked-by: Rob Herring (Arm) [elder@riscstar.com: considerably shortened the description] Signed-off-by: Alex Elder Signed-off-by: Guodong Xu Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml index 4d5c857b3cac..7ef85174353d 100644 --- a/Documentation/devicetree/bindings/riscv/starfive.yaml +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: + - deepcomputing,fml13v01 - milkv,mars - pine64,star64 - starfive,visionfive-2-v1.2a From c8b72c301dbe71a7a55298d542dff7b2c3612765 Mon Sep 17 00:00:00 2001 From: Sandie Cao Date: Mon, 28 Oct 2024 16:25:53 +0800 Subject: [PATCH 6/6] riscv: dts: starfive: add DeepComputing FML13V01 board device tree The FML13V01 board from DeepComputing incorporates a StarFive JH7110 SoC. It is a mainboard designed for the Framework Laptop 13 Chassis, which has (Framework) SKU FRANHQ0001. The FML13V01 board features: - StarFive JH7110 SoC - LPDDR4 8GB - eMMC 32GB or 128GB - QSPI Flash - MicroSD Slot - PCIe-based Wi-Fi - 4 USB-C Ports - Port 1: PD 3.0 (60W Max), USB 3.2 Gen 1, DP 1.4 (4K@30Hz/2.5K@60Hz) - Port 2: PD 3.0 (60W Max), USB 3.2 Gen 1 - Port 3 & 4: USB 3.2 Gen 1 Create the DTS file for the DeepComputing FML13V01 board. Based on 'jh7110-common.dtsi', usb0 is enabled and is set to operate as a "host". Signed-off-by: Sandie Cao [elder@riscstar.com: revised the description, updated some nodes] Signed-off-by: Alex Elder Signed-off-by: Guodong Xu Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../starfive/jh7110-deepcomputing-fml13v01.dts | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 7a163a7d6ba3..b3bb12f78e7d 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -8,6 +8,7 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts new file mode 100644 index 000000000000..30b0715196b6 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 DeepComputing (HK) Limited + */ + +/dts-v1/; +#include "jh7110-common.dtsi" + +/ { + model = "DeepComputing FML13V01"; + compatible = "deepcomputing,fml13v01", "starfive,jh7110"; +}; + +&usb0 { + dr_mode = "host"; + status = "okay"; +};