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cxl: Align interleave decode/encode helpers with their callers

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The interleave conversion helpers translate between encoded HDM
interleave values and the granularity and way values used by the
driver.

These helpers have been a recurring source of static analysis
complaints that expose type mismatches and potentially uninitialized
outputs. Fix those issues in the helpers so callers inherit the
consistent behavior automatically.

The decode and encode helpers have different interface issues.

The decode helpers return values through unsigned int pointers, but
the decoded values are ultimately represented as int throughout the
driver. Align the helper interfaces with their callers by changing
the out-parameters to int * and updating the handful of affected
locals to match.

The encode helpers leave their out-parameters unchanged on error. That
means callers that ignore the return value may observe uninitialized
encoded values. Initialize the outputs so failed conversions leave
defined values. This issue was originally reported by Purva and the
helper-side fix was suggested by Dan [1].

Tidy up a related, pre-existing, printk format specifier mismatch in
cxl_validate_translation_params().

No functional change for valid interleave parameters.

[1] https://lore.kernel.org/linux-cxl/20250419203530.45594-1-purvayeshi550@gmail.com/

Reported-by: Purva Yeshi <purvayeshi550@gmail.com>
Suggested-by: Dan Williams <djbw@kernel.org>
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://patch.msgid.link/20260605040801.865965-1-alison.schofield@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
This commit is contained in:
Alison Schofield 2026-06-04 21:07:59 -07:00 committed by Dave Jiang
parent dfe28c8592
commit 661c092f98
3 changed files with 11 additions and 9 deletions
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10
drivers/cxl/acpi.c
View File

@ -101,8 +101,8 @@ static int cxl_parse_cxims(union acpi_subtable_headers *header, void *arg,
struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld;
struct device *dev = ctx->dev;
struct cxl_cxims_data *cximsd;
unsigned int hbig, nr_maps;
int rc;
unsigned int nr_maps;
int hbig, rc;
rc = eig_to_granularity(cxims->hbig, &hbig);
if (rc)
@ -160,7 +160,7 @@ static int cxl_acpi_cfmws_verify(struct device *dev,
struct acpi_cedt_cfmws *cfmws)
{
int rc, expected_len;
unsigned int ways;
int ways;
if (cfmws->interleave_arithmetic != ACPI_CEDT_CFMWS_ARITHMETIC_MODULO &&
cfmws->interleave_arithmetic != ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
@ -405,7 +405,7 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
struct cxl_cxims_context cxims_ctx;
struct device *dev = ctx->dev;
struct cxl_decoder *cxld;
unsigned int ways, i, ig;
int ways, i, ig;
int rc;
rc = cxl_acpi_cfmws_verify(dev, cfmws);
@ -464,7 +464,7 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
if (rc < 0)
return rc;
if (!cxlrd->platform_data) {
dev_err(dev, "No CXIMS for HBIG %u\n", ig);
dev_err(dev, "No CXIMS for HBIG %d\n", ig);
return -EINVAL;
}
}

4
drivers/cxl/core/region.c
View File

@ -3058,7 +3058,7 @@ int cxl_validate_translation_params(u8 eiw, u16 eig, int pos)
return -EINVAL;
}
if (pos < 0 || pos >= ways) {
pr_debug("%s: invalid pos=%d for ways=%u\n", __func__, pos,
pr_debug("%s: invalid pos=%d for ways=%d\n", __func__, pos,
ways);
return -EINVAL;
}
@ -3104,7 +3104,7 @@ EXPORT_SYMBOL_FOR_MODULES(cxl_calculate_dpa_offset, "cxl_translate");
int cxl_calculate_position(u64 hpa_offset, u8 eiw, u16 eig)
{
unsigned int ways = 0;
int ways = 0;
u64 shifted, rem;
int pos, ret;

6
drivers/cxl/cxl.h
View File

@ -91,7 +91,7 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
}
/* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
static inline int eig_to_granularity(u16 eig, int *granularity)
{
if (eig > CXL_DECODER_MAX_ENCODED_IG)
return -EINVAL;
@ -100,7 +100,7 @@ static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
}
/* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
static inline int eiw_to_ways(u8 eiw, unsigned int *ways)
static inline int eiw_to_ways(u8 eiw, int *ways)
{
switch (eiw) {
case 0 ... 4:
@ -118,6 +118,7 @@ static inline int eiw_to_ways(u8 eiw, unsigned int *ways)
static inline int granularity_to_eig(int granularity, u16 *eig)
{
*eig = 0;
if (granularity > SZ_16K || granularity < CXL_DECODER_MIN_GRANULARITY ||
!is_power_of_2(granularity))
return -EINVAL;
@ -127,6 +128,7 @@ static inline int granularity_to_eig(int granularity, u16 *eig)
static inline int ways_to_eiw(unsigned int ways, u8 *eiw)
{
*eiw = 0;
if (ways > 16)
return -EINVAL;
if (is_power_of_2(ways)) {