From 26b8eb8a98c18b2ee4ea76d99fa2b2a5ccbc1b6c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Jul 2026 11:35:24 +0200 Subject: [PATCH 1/3] arm64: dts: amd: seattle: Remove useless clocks DTSI include The "amd-seattle-clks.dtsi" file is included exactly once, so paste the contents directly in proper DTSI. No functional impact. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260706093523.274093-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi | 43 ------------------- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 36 +++++++++++++++- 2 files changed, 35 insertions(+), 44 deletions(-) delete mode 100644 arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi diff --git a/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi deleted file mode 100644 index 73f687773ce6..000000000000 --- a/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * DTS file for AMD Seattle Clocks - * - * Copyright (C) 2014 Advanced Micro Devices, Inc. - */ - - adl3clk_100mhz: uartspiclk_100mhz: clock-100000000 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-output-names = "adl3clk_100mhz"; - }; - - ccpclk_375mhz: clock-375000000 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <375000000>; - clock-output-names = "ccpclk_375mhz"; - }; - - sataclk_333mhz: clock-333000000 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <333000000>; - clock-output-names = "sataclk_333mhz"; - }; - - dmaclk_500mhz: pcieclk_500mhz: clock-500000000 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <500000000>; - clock-output-names = "pcieclk_500mhz"; - }; - - xgmacclk0_dma_250mhz: xgmacclk0_ptp_250mhz: xgmacclk1_dma_250mhz: xgmacclk1_ptp_250mhz: - miscclk_250mhz: clock-250000000 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - clock-output-names = "miscclk_250mhz"; - }; - diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi index a611f8288b3e..c5b9dbfdf014 100644 --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi @@ -11,7 +11,41 @@ / { #address-cells = <2>; #size-cells = <2>; - /include/ "amd-seattle-clks.dtsi" + adl3clk_100mhz: uartspiclk_100mhz: clock-100000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "adl3clk_100mhz"; + }; + + ccpclk_375mhz: clock-375000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <375000000>; + clock-output-names = "ccpclk_375mhz"; + }; + + sataclk_333mhz: clock-333000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <333000000>; + clock-output-names = "sataclk_333mhz"; + }; + + dmaclk_500mhz: pcieclk_500mhz: clock-500000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + clock-output-names = "pcieclk_500mhz"; + }; + + xgmacclk0_dma_250mhz: xgmacclk0_ptp_250mhz: xgmacclk1_dma_250mhz: xgmacclk1_ptp_250mhz: + miscclk_250mhz: clock-250000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + clock-output-names = "miscclk_250mhz"; + }; gic0: interrupt-controller@e1101000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; From 8461050861aeea29138dd25d5fb78c6f643c708c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Jul 2026 11:35:25 +0200 Subject: [PATCH 2/3] arm64: dts: amd: seattle: Remove useless xgbe DTSI include The "amd-seattle-xgbe-b.dtsi" file is included exactly once, so paste the contents directly in proper DTSI. No functional impact. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260706093523.274093-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski --- .../boot/dts/amd/amd-overdrive-rev-b0.dts | 78 ++++++++++++++++- .../boot/dts/amd/amd-seattle-xgbe-b.dtsi | 84 ------------------- 2 files changed, 77 insertions(+), 85 deletions(-) delete mode 100644 arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts index 8862adae44e9..0860fc7a6927 100644 --- a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts +++ b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts @@ -71,5 +71,81 @@ sdcard0: mmc@0 { }; &smb0 { - /include/ "amd-seattle-xgbe-b.dtsi" + xgmac0: ethernet@e0700000 { + compatible = "amd,xgbe-seattle-v1a"; + reg = <0 0xe0700000 0 0x80000>, + <0 0xe0780000 0 0x80000>, + <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */ + <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */ + <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */ + interrupts = <0 325 4>, + <0 346 1>, <0 347 1>, <0 348 1>, <0 349 1>, + <0 323 4>; + amd,per-channel-interrupt; + amd,speed-set = <0>; + amd,serdes-blwc = <1>, <1>, <0>; + amd,serdes-cdr-rate = <2>, <2>, <7>; + amd,serdes-pq-skew = <10>, <10>, <18>; + amd,serdes-tx-amp = <0>, <0>, <0>; + amd,serdes-dfe-tap-config = <3>, <3>, <3>; + amd,serdes-dfe-tap-enable = <0>, <0>, <7>; + mac-address = [ 02 A1 A2 A3 A4 A5 ]; + clocks = <&xgmacclk0_dma_250mhz>, <&xgmacclk0_ptp_250mhz>; + clock-names = "dma_clk", "ptp_clk"; + phy-mode = "xgmii"; + iommus = <&xgmac0_smmu 0x00 0x17>; /* 0-7, 16-23 */ + dma-coherent; + }; + + xgmac1: ethernet@e0900000 { + compatible = "amd,xgbe-seattle-v1a"; + reg = <0 0xe0900000 0 0x80000>, + <0 0xe0980000 0 0x80000>, + <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */ + <0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */ + <0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */ + interrupts = <0 324 4>, + <0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>, + <0 322 4>; + amd,per-channel-interrupt; + amd,speed-set = <0>; + amd,serdes-blwc = <1>, <1>, <0>; + amd,serdes-cdr-rate = <2>, <2>, <7>; + amd,serdes-pq-skew = <10>, <10>, <18>; + amd,serdes-tx-amp = <0>, <0>, <0>; + amd,serdes-dfe-tap-config = <3>, <3>, <3>; + amd,serdes-dfe-tap-enable = <0>, <0>, <7>; + mac-address = [ 02 B1 B2 B3 B4 B5 ]; + clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>; + clock-names = "dma_clk", "ptp_clk"; + phy-mode = "xgmii"; + iommus = <&xgmac1_smmu 0x00 0x17>; /* 0-7, 16-23 */ + dma-coherent; + }; + + xgmac0_smmu: iommu@e0600000 { + compatible = "arm,mmu-401"; + reg = <0 0xe0600000 0 0x10000>; + #global-interrupts = <1>; + interrupts = /* Uses combined intr for both + * global and context + */ + <0 336 4>, + <0 336 4>; + #iommu-cells = <2>; + dma-coherent; + }; + + xgmac1_smmu: iommu@e0800000 { + compatible = "arm,mmu-401"; + reg = <0 0xe0800000 0 0x10000>; + #global-interrupts = <1>; + interrupts = /* Uses combined intr for both + * global and context + */ + <0 335 4>, + <0 335 4>; + #iommu-cells = <2>; + dma-coherent; + }; }; diff --git a/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi deleted file mode 100644 index 18b0c2dd1b2d..000000000000 --- a/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi +++ /dev/null @@ -1,84 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * DTS file for AMD Seattle XGBE (RevB) - * - * Copyright (C) 2015 Advanced Micro Devices, Inc. - */ - - xgmac0: ethernet@e0700000 { - compatible = "amd,xgbe-seattle-v1a"; - reg = <0 0xe0700000 0 0x80000>, - <0 0xe0780000 0 0x80000>, - <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */ - <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */ - <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */ - interrupts = <0 325 4>, - <0 346 1>, <0 347 1>, <0 348 1>, <0 349 1>, - <0 323 4>; - amd,per-channel-interrupt; - amd,speed-set = <0>; - amd,serdes-blwc = <1>, <1>, <0>; - amd,serdes-cdr-rate = <2>, <2>, <7>; - amd,serdes-pq-skew = <10>, <10>, <18>; - amd,serdes-tx-amp = <0>, <0>, <0>; - amd,serdes-dfe-tap-config = <3>, <3>, <3>; - amd,serdes-dfe-tap-enable = <0>, <0>, <7>; - mac-address = [ 02 A1 A2 A3 A4 A5 ]; - clocks = <&xgmacclk0_dma_250mhz>, <&xgmacclk0_ptp_250mhz>; - clock-names = "dma_clk", "ptp_clk"; - phy-mode = "xgmii"; - iommus = <&xgmac0_smmu 0x00 0x17>; /* 0-7, 16-23 */ - dma-coherent; - }; - - xgmac1: ethernet@e0900000 { - compatible = "amd,xgbe-seattle-v1a"; - reg = <0 0xe0900000 0 0x80000>, - <0 0xe0980000 0 0x80000>, - <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */ - <0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */ - <0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */ - interrupts = <0 324 4>, - <0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>, - <0 322 4>; - amd,per-channel-interrupt; - amd,speed-set = <0>; - amd,serdes-blwc = <1>, <1>, <0>; - amd,serdes-cdr-rate = <2>, <2>, <7>; - amd,serdes-pq-skew = <10>, <10>, <18>; - amd,serdes-tx-amp = <0>, <0>, <0>; - amd,serdes-dfe-tap-config = <3>, <3>, <3>; - amd,serdes-dfe-tap-enable = <0>, <0>, <7>; - mac-address = [ 02 B1 B2 B3 B4 B5 ]; - clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>; - clock-names = "dma_clk", "ptp_clk"; - phy-mode = "xgmii"; - iommus = <&xgmac1_smmu 0x00 0x17>; /* 0-7, 16-23 */ - dma-coherent; - }; - - xgmac0_smmu: iommu@e0600000 { - compatible = "arm,mmu-401"; - reg = <0 0xe0600000 0 0x10000>; - #global-interrupts = <1>; - interrupts = /* Uses combined intr for both - * global and context - */ - <0 336 4>, - <0 336 4>; - #iommu-cells = <2>; - dma-coherent; - }; - - xgmac1_smmu: iommu@e0800000 { - compatible = "arm,mmu-401"; - reg = <0 0xe0800000 0 0x10000>; - #global-interrupts = <1>; - interrupts = /* Uses combined intr for both - * global and context - */ - <0 335 4>, - <0 335 4>; - #iommu-cells = <2>; - dma-coherent; - }; From 7c78d6fa9aec67a72a498cda5cdbaced890cb038 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 1 Aug 2026 23:02:12 +0200 Subject: [PATCH 3/3] arm64: dts: Correct white-space style Correct a few white-space issues, like missing space before bracket '{' character or spurious space, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Michal Simek # Versal NET Acked-by: Sven Peter # for apple dts Link: https://patch.msgid.link/20260801210210.383417-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 2 +- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 2 +- arch/arm64/boot/dts/apm/apm-storm.dtsi | 2 +- arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi | 2 +- arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 2 +- arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts | 2 +- arch/arm64/boot/dts/marvell/armada-3720-db.dts | 2 +- arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi | 4 ++-- arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi | 2 +- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 2 +- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 2 +- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 4 ++-- arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++-- 13 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts index a1c5d10f2f54..91df4793dd6e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -546,7 +546,7 @@ &spdifout_b { }; &tdmif_a { - pinctrl-0 = <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>, <&tdm_a_dout0_pins> ; + pinctrl-0 = <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>, <&tdm_a_dout0_pins>; pinctrl-names = "default"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index e930f2f26f4b..e110792cdc76 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -293,7 +293,7 @@ socpll: socpll@17000120 { clock-output-names = "socpll"; }; - socplldiv2: socplldiv2 { + socplldiv2: socplldiv2 { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&socpll 0>; diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index 4c4938faffb1..d67f5ed985a2 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -174,7 +174,7 @@ socpll: socpll@17000120 { clock-output-names = "socpll"; }; - socplldiv2: socplldiv2 { + socplldiv2: socplldiv2 { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&socpll 0>; diff --git a/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi b/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi index ee12fea5b12c..926bb4ab77af 100644 --- a/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi +++ b/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi @@ -33,6 +33,6 @@ &hpm2 { interrupts = <44 IRQ_TYPE_LEVEL_LOW>; }; -&hpm3 { +&hpm3 { interrupts = <44 IRQ_TYPE_LEVEL_LOW>; }; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index 761c59d90ffc..6a066c43d24a 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -644,7 +644,7 @@ mip1: msi-controller@1000131000 { brcm,msi-offset = <8>; }; - isp: isp@1000880000 { + isp: isp@1000880000 { compatible = "brcm,bcm2712-pispbe", "raspberrypi,pispbe"; reg = <0x10 0x00880000 0x0 0x4000>; interrupts = ; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts index 82cd4115746e..afe4ef182ee7 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts @@ -107,7 +107,7 @@ qspi_boot: partition@0 { reg = <0x0 0x00c00000>; }; - root: partition@c00000 { + root: partition@c00000 { label = "root"; reg = <0x00c00000 0x03400000>; }; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts index 06d4a3a93f84..efc32074bb11 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts @@ -109,7 +109,7 @@ gpio_exp: pca9555@22 { */ }; - rtc@68 { + rtc@68 { /* PT7C4337A from pericom fully compatible with the ds1337 */ compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi index 91ba5f7dc9b4..feffb9c299fd 100644 --- a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi @@ -353,7 +353,7 @@ cp0_mmc0_cd_pins: cp0-mmc0-cd-pins { marvell,function = "sdio_cd"; }; - cp0_pwrbtn_pins: cp0-pwrbtn-pins { + cp0_pwrbtn_pins: cp0-pwrbtn-pins { marvell,pins = "mpp31"; marvell,function = "gpio"; }; @@ -378,7 +378,7 @@ cp0_spi1_cs1_pins: cp0-spi1-cs1-pins { marvell,function = "spi1"; }; - cp0_uart2_pins: cp0-uart2-pins { + cp0_uart2_pins: cp0-uart2-pins { marvell,pins = "mpp50", "mpp51"; marvell,function = "uart2"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi index 16cf4414de59..6f4879c49da2 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi @@ -1159,7 +1159,7 @@ asrc_out5_ep: endpoint { }; }; - asrc_out6_port: port@c { + asrc_out6_port: port@c { reg = <0xc>; asrc_out6_ep: endpoint { diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 8e0c51e496e2..ff9b73d5db2a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -1765,7 +1765,7 @@ asrc_out5_ep: endpoint { }; }; - asrc_out6_port: port@c { + asrc_out6_port: port@c { reg = <0xc>; asrc_out6_ep: endpoint { diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi index 2d8e7e37830f..8d52d9e7c711 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -1945,7 +1945,7 @@ asrc_out5_ep: endpoint { }; }; - asrc_out6_port: port@c { + asrc_out6_port: port@c { reg = <0xc>; asrc_out6_ep: endpoint { diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 14e033f365e3..b5db62a0a550 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -404,11 +404,11 @@ scmi_vddio1: regulator@0 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; - scmi_vddcore: regulator@11 { + scmi_vddcore: regulator@11 { reg = ; regulator-name = "vddcore"; }; - scmi_v1v8: regulator@14 { + scmi_v1v8: regulator@14 { reg = ; regulator-name = "v1v8"; }; diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/dts/xilinx/versal-net.dtsi index 15f767608e67..21bb917bcba1 100644 --- a/arch/arm64/boot/dts/xilinx/versal-net.dtsi +++ b/arch/arm64/boot/dts/xilinx/versal-net.dtsi @@ -1074,7 +1074,7 @@ usb0: usb@f1e00000 { #address-cells = <2>; #size-cells = <2>; - dwc3_0: usb@f1b00000 { + dwc3_0: usb@f1b00000 { compatible = "snps,dwc3"; status = "disabled"; reg = <0 0xf1b00000 0 0x10000>; @@ -1099,7 +1099,7 @@ usb1: usb@f1e10000 { #address-cells = <2>; #size-cells = <2>; - dwc3_1: usb@f1c00000 { + dwc3_1: usb@f1c00000 { compatible = "snps,dwc3"; status = "disabled"; reg = <0x0 0xf1c00000 0x0 0x10000>;