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drm/i915/de: Introduce intel_de.c and move intel_de_{read,write}8() there

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intel_de_{read,write}8() aren't performance critical so having them
as static inline is pointless. Introduce intel_de.c and move the
implementation there.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260313111028.25159-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2026-03-13 13:10:26 +02:00
parent 968e9fd188
commit 658b3c963d
4 changed files with 28 additions and 19 deletions
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1
drivers/gpu/drm/i915/Makefile
View File

@ -254,6 +254,7 @@ i915-y += \
display/intel_crtc_state_dump.o \
display/intel_cursor.o \
display/intel_dbuf_bw.o \
display/intel_de.o \
display/intel_display.o \
display/intel_display_conversion.o \
display/intel_display_driver.o \

23
drivers/gpu/drm/i915/display/intel_de.c Normal file
View File

@ -0,0 +1,23 @@
// SPDX-License-Identifier: MIT
/*
* Copyright © 2026 Intel Corporation
*/
#include <drm/drm_print.h>
#include "intel_de.h"
u8 intel_de_read8(struct intel_display *display, i915_reg_t reg)
{
/* this is only used on VGA registers (possible on pre-g4x) */
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
return intel_uncore_read8(__to_uncore(display), reg);
}
void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
{
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
intel_uncore_write8(__to_uncore(display), reg, val);
}

22
drivers/gpu/drm/i915/display/intel_de.h
View File

@ -6,8 +6,6 @@
#ifndef __INTEL_DE_H__
#define __INTEL_DE_H__
#include <drm/drm_print.h>
#include "intel_display_core.h"
#include "intel_dmc_wl.h"
#include "intel_dsb.h"
@ -19,6 +17,9 @@ static inline struct intel_uncore *__to_uncore(struct intel_display *display)
return to_intel_uncore(display->drm);
}
u8 intel_de_read8(struct intel_display *display, i915_reg_t reg);
void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val);
static inline u32
intel_de_read(struct intel_display *display, i915_reg_t reg)
{
@ -33,23 +34,6 @@ intel_de_read(struct intel_display *display, i915_reg_t reg)
return val;
}
static inline u8
intel_de_read8(struct intel_display *display, i915_reg_t reg)
{
/* this is only used on VGA registers (possible on pre-g4x) */
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
return intel_uncore_read8(__to_uncore(display), reg);
}
static inline void
intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
{
drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
intel_uncore_write8(__to_uncore(display), reg, val);
}
static inline u64
intel_de_read64_2x32(struct intel_display *display,
i915_reg_t lower_reg, i915_reg_t upper_reg)

1
drivers/gpu/drm/xe/Makefile
View File

@ -249,6 +249,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_dbuf_bw.o \
i915-display/intel_ddi.o \
i915-display/intel_ddi_buf_trans.o \
i915-display/intel_de.o \
i915-display/intel_display.o \
i915-display/intel_display_conversion.o \
i915-display/intel_display_device.o \