spi: rockchip: clear interrupt status in error handler

The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.

Change-Id: Ib215d63d8572e3fc8d843652687e1ebfb7ff531e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin 2021-12-23 10:29:04 +08:00 committed by Tao Huang
parent df5f245c28
commit 652b70446f

View File

@ -280,8 +280,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr,
*/
spi_enable_chip(rs, false);
/* make sure all interrupts are masked */
/* make sure all interrupts are masked and status cleared */
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
if (atomic_read(&rs->state) & TXDMA)
dmaengine_terminate_async(ctlr->dma_tx);