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arm64: dts: ls1046a: describe the Lynx 10G SerDes blocks
Describe the two Lynx 10G SerDes blocks and their associated lanes found on the LS1046A SoC. The nodes are left disabled at the SoC level; board DTs will be expected to enable them once the consumer Ethernet nodes appear. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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@ -424,6 +424,66 @@ sfp: efuse@1e80000 {
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clock-names = "sfp";
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};
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serdes1: phy@1ea0000 {
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compatible = "fsl,ls1046a-serdes1";
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reg = <0x00 0x1ea0000 0x0 0x2000>;
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#address-cells = <1>;
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#size-cells = <0>;
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#phy-cells = <1>;
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big-endian;
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status = "disabled";
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serdes1_lane_a: phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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serdes1_lane_b: phy@1 {
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reg = <1>;
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#phy-cells = <0>;
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};
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serdes1_lane_c: phy@2 {
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reg = <2>;
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#phy-cells = <0>;
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};
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serdes1_lane_d: phy@3 {
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reg = <3>;
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#phy-cells = <0>;
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};
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};
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serdes2: phy@1eb0000 {
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compatible = "fsl,ls1046a-serdes2";
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reg = <0x00 0x1eb0000 0x0 0x2000>;
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#address-cells = <1>;
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#size-cells = <0>;
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#phy-cells = <1>;
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big-endian;
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status = "disabled";
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serdes2_lane_a: phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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serdes2_lane_b: phy@1 {
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reg = <1>;
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#phy-cells = <0>;
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};
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serdes2_lane_c: phy@2 {
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reg = <2>;
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#phy-cells = <0>;
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};
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serdes2_lane_d: phy@3 {
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reg = <3>;
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#phy-cells = <0>;
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};
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};
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dcfg: dcfg@1ee0000 {
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compatible = "fsl,ls1046a-dcfg", "syscon";
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reg = <0x0 0x1ee0000 0x0 0x1000>;
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