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drm/i915: Clean up gen2 DPLL readout

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The current gen2 DPLL readout code:
* assumes i845/i865 have LVDS which is not true
* assumes only pipe B can drive LVDS (true, but makes
  the code appear a bit magical)
* hard to parse in general

Clean it up by checking for i85x (the only gen2 platform
with LVDS) and reusing intel_lvds_port_enabled().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210715093530.31711-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2021-07-15 12:35:19 +03:00
parent 35a17f93e0
commit 6501e6bb14
1 changed files with 6 additions and 5 deletions
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11
drivers/gpu/drm/i915/display/intel_display.c
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@ -6319,7 +6319,6 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
enum pipe pipe = crtc->pipe;
u32 dpll = pipe_config->dpll_hw_state.dpll; u32 dpll = pipe_config->dpll_hw_state.dpll;
u32 fp; u32 fp;
struct dpll clock; struct dpll clock;
@ -6369,11 +6368,13 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
else else
port_clock = i9xx_calc_dpll_params(refclk, &clock); port_clock = i9xx_calc_dpll_params(refclk, &clock);
} else { } else {
u32 lvds = IS_I830(dev_priv) ? 0 : intel_de_read(dev_priv, enum pipe lvds_pipe;
LVDS);
bool is_lvds = (pipe == 1) && (lvds & LVDS_PORT_EN); if (IS_I85X(dev_priv) &&
intel_lvds_port_enabled(dev_priv, LVDS, &lvds_pipe) &&
lvds_pipe == crtc->pipe) {
u32 lvds = intel_de_read(dev_priv, LVDS);
if (is_lvds) {
clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >> clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
DPLL_FPA01_P1_POST_DIV_SHIFT); DPLL_FPA01_P1_POST_DIV_SHIFT);