From 62361b38315f1d4ae7b6d5311bb3890d660a133f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:27:59 +0100 Subject: [PATCH 01/29] dt-bindings: gpio: nomadik: convert into yaml format MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Create gpio/st,nomadik-gpio.yaml json-schema dt-bindings file as a direct translation from gpio-nmk.txt. Remove the txt file. Add clocks and gpio-ranges properties which were missing and are being used in Nomadik devicetrees. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-1-3ba757474006@bootlin.com [Dropped an unused label] Signed-off-by: Linus Walleij --- .../devicetree/bindings/gpio/gpio-nmk.txt | 31 -------- .../bindings/gpio/st,nomadik-gpio.yaml | 76 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 77 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-nmk.txt create mode 100644 Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt deleted file mode 100644 index 8315ac7780ef..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt +++ /dev/null @@ -1,31 +0,0 @@ -Nomadik GPIO controller - -Required properties: -- compatible : Should be "st,nomadik-gpio". -- reg : Physical base address and length of the controller's registers. -- interrupts : The interrupt outputs from the controller. -- #gpio-cells : Should be two: - The first cell is the pin number. - The second cell is used to specify optional parameters: - - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. -- gpio-controller : Marks the device node as a GPIO controller. -- interrupt-controller : Marks the device node as an interrupt controller. -- gpio-bank : Specifies which bank a controller owns. -- st,supports-sleepmode : Specifies whether controller can sleep or not - -Example: - - gpio1: gpio@8012e080 { - compatible = "st,nomadik-gpio"; - reg = <0x8012e080 0x80>; - interrupts = <0 120 0x4>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - st,supports-sleepmode; - gpio-bank = <1>; - }; diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml new file mode 100644 index 000000000000..ba1cc69fbbb3 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/st,nomadik-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nomadik GPIO controller + +description: + The Nomadik GPIO driver handles Nomadik SoC GPIO blocks. This block has also + been called ST STA2X11. On the Nomadik platform, this driver is intertwined + with pinctrl-nomadik. + +maintainers: + - Linus Walleij + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: st,nomadik-gpio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + gpio-bank: + description: System-wide GPIO bank index. + $ref: /schemas/types.yaml#/definitions/uint32 + + st,supports-sleepmode: + description: Whether the controller can sleep or not. + $ref: /schemas/types.yaml#/definitions/flag + + clocks: + maxItems: 1 + + gpio-ranges: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - "#gpio-cells" + - gpio-controller + - interrupt-controller + - gpio-bank + +unevaluatedProperties: false + +examples: + - | + gpio@8012e080 { + compatible = "st,nomadik-gpio"; + reg = <0x8012e080 0x80>; + interrupts = <0 120 0x4>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + st,supports-sleepmode; + gpio-bank = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 8d1052fa6a69..c03718d39384 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2465,6 +2465,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git F: Documentation/devicetree/bindings/arm/ste-* F: Documentation/devicetree/bindings/arm/ux500.yaml F: Documentation/devicetree/bindings/arm/ux500/ +F: Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml F: Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml F: arch/arm/boot/dts/st/ste-* F: arch/arm/mach-nomadik/ From a610f544854374cd108dd75e8a0d5473d011fa37 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:00 +0100 Subject: [PATCH 02/29] dt-bindings: gpio: nomadik: add optional ngpios property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This GPIO controller can support a lesser number of GPIOs than 32. Express that in devicetree using an optional, generic property. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-2-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index ba1cc69fbbb3..aa905f001c8f 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -51,6 +51,10 @@ properties: gpio-ranges: maxItems: 1 + ngpios: + minimum: 0 + maximum: 32 + required: - compatible - reg From fa55bcecf272f7795c42653aa1ed0b156123c5fa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:01 +0100 Subject: [PATCH 03/29] dt-bindings: gpio: nomadik: add mobileye,eyeq5-gpio compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This GPIO controller is used on the Mobileye EyeQ5 SoC. Add its compatible to the dt-bindings. One difference is that the block as integrated on EyeQ5 does not support sleep-mode. Signed-off-by: Théo Lebrun Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-3-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- .../devicetree/bindings/gpio/st,nomadik-gpio.yaml | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index aa905f001c8f..16956969a02a 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -19,7 +19,9 @@ properties: pattern: "^gpio@[0-9a-f]+$" compatible: - const: st,nomadik-gpio + enum: + - st,nomadik-gpio + - mobileye,eyeq5-gpio reg: maxItems: 1 @@ -66,6 +68,16 @@ required: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: mobileye,eyeq5-gpio + then: + properties: + st,supports-sleepmode: false + examples: - | gpio@8012e080 { From 6abd174c9c82ad49fd7efc63c348f43eb1612908 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:02 +0100 Subject: [PATCH 04/29] dt-bindings: gpio: nomadik: add optional reset property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add optional reset device-tree property to the Nomadik GPIO controller. Acked-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-4-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index 16956969a02a..38d37d8f7201 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -57,6 +57,9 @@ properties: minimum: 0 maximum: 32 + resets: + maxItems: 1 + required: - compatible - reg From 53cf6b72e074864b94ade97dcb6f30b5ac1a82dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:03 +0100 Subject: [PATCH 05/29] gpio: nomadik: fix offset bug in nmk_pmx_set() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previously, the statement looked like: slpm[x] &= ~BIT(g->grp.pins[i]); Where: - slpm is a unsigned int pointer; - g->grp.pins[i] is a pin number. It can grow to more than 32. The expected shift amount is a pin bank offset. This bug does not occur on every group or pin: the altsetting must be NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured. For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the right altsetting and pins 229 and 230. Fixes: dbfe8ca259e1 ("pinctrl/nomadik: implement pin multiplexing") Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 7911353ac97d..4f7c4af4f93c 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1579,8 +1579,10 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, * Then mask the pins that need to be sleeping now when we're * switching to the ALT C function. */ - for (i = 0; i < g->grp.npins; i++) - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->grp.pins[i]); + for (i = 0; i < g->grp.npins; i++) { + unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; + slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + } nmk_gpio_glitch_slpm_init(slpm); } From 966942ae493650210b9514f3d4bfc95f78ef0129 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:04 +0100 Subject: [PATCH 06/29] gpio: nomadik: extract GPIO platform driver from drivers/pinctrl/nomadik/ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previously, drivers/pinctrl/nomadik/pinctrl-nomadik.c registered two platform drivers: pinctrl & GPIO. Move the GPIO aspect to the drivers/gpio/ folder, as would be expected. Both drivers are intertwined for a reason; pinctrl requires access to GPIO registers for pinmuxing, pull-disable, disabling interrupts while setting the muxing and wakeup control. Information sharing is done through a shared array containing GPIO chips and a few helper functions. That shared array is not touched from gpio-nomadik when CONFIG_PINCTRL_NOMADIK is not defined. Make no change to the code that moved into gpio-nomadik; there should be no behavior change following. A few functions are shared and header comments are added. Checkpatch warnings are addressed. NUM_BANKS is renamed to NMK_MAX_BANKS. It is supported to compile gpio-nomadik without pinctrl-nomadik. The opposite is not true. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-6-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 12 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-nomadik.c | 660 ++++++++++++++++ drivers/pinctrl/nomadik/Kconfig | 5 +- .../pinctrl/nomadik/pinctrl-nomadik-db8500.c | 3 +- .../pinctrl/nomadik/pinctrl-nomadik-stn8815.c | 3 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 722 +----------------- .../linux/gpio/gpio-nomadik.h | 122 ++- 9 files changed, 804 insertions(+), 725 deletions(-) create mode 100644 drivers/gpio/gpio-nomadik.c rename drivers/pinctrl/nomadik/pinctrl-nomadik.h => include/linux/gpio/gpio-nomadik.h (61%) diff --git a/MAINTAINERS b/MAINTAINERS index c03718d39384..c6a9ae28a783 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2474,6 +2474,7 @@ F: drivers/clk/clk-nomadik.c F: drivers/clocksource/clksrc-dbx500-prcmu.c F: drivers/dma/ste_dma40* F: drivers/pmdomain/st/ste-ux500-pm-domain.c +F: drivers/gpio/gpio-nomadik.c F: drivers/hwspinlock/u8500_hsem.c F: drivers/i2c/busses/i2c-nomadik.c F: drivers/iio/adc/ab8500-gpadc.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1301cec94f12..ff83371251c1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -478,6 +478,18 @@ config GPIO_MXS select GPIO_GENERIC select GENERIC_IRQ_CHIP +config GPIO_NOMADIK + bool "Nomadik GPIO driver" + depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + select OF_GPIO + select GPIOLIB_IRQCHIP + help + Say yes here to support the Nomadik SoC GPIO block. + + It handles up to 32 GPIOs per bank, that can all be interrupt sources. + It is deeply interconnected with the associated pinctrl driver as GPIO + registers handle muxing ("alternate functions") as well. + config GPIO_NPCM_SGPIO bool "Nuvoton SGPIO support" depends on ARCH_NPCM || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 9e40af196aae..9fc2f5931b22 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -116,6 +116,7 @@ obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o +obj-$(CONFIG_GPIO_NOMADIK) += gpio-nomadik.o obj-$(CONFIG_GPIO_NPCM_SGPIO) += gpio-npcm-sgpio.o obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c new file mode 100644 index 000000000000..e39477e1a58f --- /dev/null +++ b/drivers/gpio/gpio-nomadik.c @@ -0,0 +1,660 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * GPIO driver for the IP block found in the Nomadik SoC; it is an AMBA device, + * managing 32 pins with alternate functions. It can also handle the STA2X11 + * block from ST. + * + * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for + * pinmuxing functionality and others. + * + * Copyright (C) 2008,2009 STMicroelectronics + * Copyright (C) 2009 Alessandro Rubini + * Rewritten based on work by Prafulla WADASKAR + * Copyright (C) 2011-2013 Linus Walleij + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#ifndef CONFIG_PINCTRL_NOMADIK +static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); +#endif + +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode) +{ + u32 slpm; + + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); + if (mode == NMK_GPIO_SLPM_NOCHANGE) + slpm |= BIT(offset); + else + slpm &= ~BIT(offset); + writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); +} + +static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + if (val) + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); + else + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); +} + +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); + __nmk_gpio_set_output(nmk_chip, offset, val); +} + +/* IRQ functions */ + +static void nmk_gpio_irq_ack(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); + clk_disable(nmk_chip->clk); +} + +enum nmk_gpio_irq_type { + NORMAL, + WAKE, +}; + +static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, + int offset, enum nmk_gpio_irq_type which, + bool enable) +{ + u32 *rimscval; + u32 *fimscval; + u32 rimscreg; + u32 fimscreg; + + if (which == NORMAL) { + rimscreg = NMK_GPIO_RIMSC; + fimscreg = NMK_GPIO_FIMSC; + rimscval = &nmk_chip->rimsc; + fimscval = &nmk_chip->fimsc; + } else { + rimscreg = NMK_GPIO_RWIMSC; + fimscreg = NMK_GPIO_FWIMSC; + rimscval = &nmk_chip->rwimsc; + fimscval = &nmk_chip->fwimsc; + } + + /* we must individually set/clear the two edges */ + if (nmk_chip->edge_rising & BIT(offset)) { + if (enable) + *rimscval |= BIT(offset); + else + *rimscval &= ~BIT(offset); + writel(*rimscval, nmk_chip->addr + rimscreg); + } + if (nmk_chip->edge_falling & BIT(offset)) { + if (enable) + *fimscval |= BIT(offset); + else + *fimscval &= ~BIT(offset); + writel(*fimscval, nmk_chip->addr + fimscreg); + } +} + +static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, + int offset, bool on) +{ + /* + * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is + * disabled, since setting SLPM to 1 increases power consumption, and + * wakeup is anyhow controlled by the RIMSC and FIMSC registers. + */ + if (nmk_chip->sleepmode && on) { + __nmk_gpio_set_slpm(nmk_chip, offset, + NMK_GPIO_SLPM_WAKEUP_ENABLE); + } + + __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); +} + +static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, + struct irq_data *d, bool enable) +{ + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); + + if (!(nmk_chip->real_wake & BIT(d->hwirq))) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_maskunmask(nmk_chip, d, false); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); +} + +static void nmk_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); + nmk_gpio_irq_maskunmask(nmk_chip, d, true); +} + +static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + if (irqd_irq_disabled(d)) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); + + if (on) + nmk_chip->real_wake |= BIT(d->hwirq); + else + nmk_chip->real_wake &= ~BIT(d->hwirq); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + bool enabled = !irqd_irq_disabled(d); + bool wake = irqd_is_wakeup_set(d); + unsigned long flags; + + if (type & IRQ_TYPE_LEVEL_HIGH) + return -EINVAL; + if (type & IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_chip->lock, flags); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); + + nmk_chip->edge_rising &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_RISING) + nmk_chip->edge_rising |= BIT(d->hwirq); + + nmk_chip->edge_falling &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_FALLING) + nmk_chip->edge_falling |= BIT(d->hwirq); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); + + spin_unlock_irqrestore(&nmk_chip->lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static unsigned int nmk_gpio_irq_startup(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + nmk_gpio_irq_unmask(d); + return 0; +} + +static void nmk_gpio_irq_shutdown(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_mask(d); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_handler(struct irq_desc *desc) +{ + struct irq_chip *host_chip = irq_desc_get_chip(desc); + struct gpio_chip *chip = irq_desc_get_handler_data(desc); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + u32 status; + + chained_irq_enter(host_chip, desc); + + clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); + clk_disable(nmk_chip->clk); + + while (status) { + int bit = __ffs(status); + + generic_handle_domain_irq(chip->irq.domain, bit); + status &= ~BIT(bit); + } + + chained_irq_exit(host_chip, desc); +} + +/* I/O Functions */ + +static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int dir; + + clk_enable(nmk_chip->clk); + + dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); + + clk_disable(nmk_chip->clk); + + if (dir) + return GPIO_LINE_DIRECTION_OUT; + + return GPIO_LINE_DIRECTION_IN; +} + +static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); + + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int value; + + clk_enable(nmk_chip->clk); + + value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + + clk_disable(nmk_chip->clk); + + return value; +} + +static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_set_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); +} + +static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_make_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS + +static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) +{ + u32 afunc, bfunc; + + clk_enable(nmk_chip->clk); + + afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); + bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); + + clk_disable(nmk_chip->clk); + + return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); +} + +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int mode; + bool is_out; + bool data_out; + bool pull; + static const char * const modes[] = { + [NMK_GPIO_ALT_GPIO] = "gpio", + [NMK_GPIO_ALT_A] = "altA", + [NMK_GPIO_ALT_B] = "altB", + [NMK_GPIO_ALT_C] = "altC", + [NMK_GPIO_ALT_C + 1] = "altC1", + [NMK_GPIO_ALT_C + 2] = "altC2", + [NMK_GPIO_ALT_C + 3] = "altC3", + [NMK_GPIO_ALT_C + 4] = "altC4", + }; + + char *label = gpiochip_dup_line_label(chip, offset); + if (IS_ERR(label)) + return; + + clk_enable(nmk_chip->clk); + is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); + pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); + data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + mode = nmk_gpio_get_mode(nmk_chip, offset); +#ifdef CONFIG_PINCTRL_NOMADIK + if (mode == NMK_GPIO_ALT_C && pctldev) + mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); +#endif + + if (is_out) { + seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", + gpio, + label ?: "(none)", + data_out ? "hi" : "lo", + (mode < 0) ? "unknown" : modes[mode]); + } else { + int irq = chip->to_irq(chip, offset); + const int pullidx = pull ? 1 : 0; + int val; + static const char * const pulls[] = { + "none ", + "pull enabled", + }; + + seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", + gpio, + label ?: "(none)", + pulls[pullidx], + (mode < 0) ? "unknown" : modes[mode]); + + val = nmk_gpio_get_input(chip, offset); + seq_printf(s, " VAL %d", val); + + /* + * This races with request_irq(), set_irq_type(), + * and set_irq_wake() ... but those are "rare". + */ + if (irq > 0 && irq_has_action(irq)) { + char *trigger; + bool wake; + + if (nmk_chip->edge_rising & BIT(offset)) + trigger = "edge-rising"; + else if (nmk_chip->edge_falling & BIT(offset)) + trigger = "edge-falling"; + else + trigger = "edge-undefined"; + + wake = !!(nmk_chip->real_wake & BIT(offset)); + + seq_printf(s, " irq-%d %s%s", + irq, trigger, wake ? " wakeup" : ""); + } + } + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) +{ + unsigned int i, gpio = chip->base; + + for (i = 0; i < chip->ngpio; i++, gpio++) { + nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); + seq_puts(s, "\n"); + } +} + +#else + +static inline void nmk_gpio_dbg_show_one(struct seq_file *s, + struct pinctrl_dev *pctldev, + struct gpio_chip *chip, + unsigned int offset, + unsigned int gpio) +{ +} + +#define nmk_gpio_dbg_show NULL + +#endif + +/* + * We will allocate memory for the state container using devm* allocators + * binding to the first device reaching this point, it doesn't matter if + * it is the pin controller or GPIO driver. However we need to use the right + * platform device when looking up resources so pay attention to pdev. + */ +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev) +{ + struct nmk_gpio_chip *nmk_chip; + struct platform_device *gpio_pdev; + struct gpio_chip *chip; + struct resource *res; + struct clk *clk; + void __iomem *base; + u32 id; + + gpio_pdev = of_find_device_by_node(np); + if (!gpio_pdev) { + pr_err("populate \"%pOFn\": device not found\n", np); + return ERR_PTR(-ENODEV); + } + if (of_property_read_u32(np, "gpio-bank", &id)) { + dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); + platform_device_put(gpio_pdev); + return ERR_PTR(-EINVAL); + } + +#ifdef CONFIG_PINCTRL_NOMADIK + /* Already populated? */ + nmk_chip = nmk_gpio_chips[id]; + if (nmk_chip) { + platform_device_put(gpio_pdev); + return nmk_chip; + } +#endif + + nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); + if (!nmk_chip) { + platform_device_put(gpio_pdev); + return ERR_PTR(-ENOMEM); + } + + nmk_chip->bank = id; + chip = &nmk_chip->chip; + chip->base = id * NMK_GPIO_PER_CHIP; + chip->ngpio = NMK_GPIO_PER_CHIP; + chip->label = dev_name(&gpio_pdev->dev); + chip->parent = &gpio_pdev->dev; + + res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) { + platform_device_put(gpio_pdev); + return ERR_CAST(base); + } + nmk_chip->addr = base; + + clk = clk_get(&gpio_pdev->dev, NULL); + if (IS_ERR(clk)) { + platform_device_put(gpio_pdev); + return (void *)clk; + } + clk_prepare(clk); + nmk_chip->clk = clk; + +#ifdef CONFIG_PINCTRL_NOMADIK + BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); + nmk_gpio_chips[id] = nmk_chip; +#endif + return nmk_chip; +} + +static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, + gc->base, gc->base + gc->ngpio - 1); +} + +static const struct irq_chip nmk_irq_chip = { + .irq_ack = nmk_gpio_irq_ack, + .irq_mask = nmk_gpio_irq_mask, + .irq_unmask = nmk_gpio_irq_unmask, + .irq_set_type = nmk_gpio_irq_set_type, + .irq_set_wake = nmk_gpio_irq_set_wake, + .irq_startup = nmk_gpio_irq_startup, + .irq_shutdown = nmk_gpio_irq_shutdown, + .irq_print_chip = nmk_gpio_irq_print_chip, + .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + +static int nmk_gpio_probe(struct platform_device *dev) +{ + struct device_node *np = dev->dev.of_node; + struct nmk_gpio_chip *nmk_chip; + struct gpio_chip *chip; + struct gpio_irq_chip *girq; + bool supports_sleepmode; + int irq; + int ret; + + nmk_chip = nmk_gpio_populate_chip(np, dev); + if (IS_ERR(nmk_chip)) { + dev_err(&dev->dev, "could not populate nmk chip struct\n"); + return PTR_ERR(nmk_chip); + } + + supports_sleepmode = + of_property_read_bool(np, "st,supports-sleepmode"); + + /* Correct platform device ID */ + dev->id = nmk_chip->bank; + + irq = platform_get_irq(dev, 0); + if (irq < 0) + return irq; + + /* + * The virt address in nmk_chip->addr is in the nomadik register space, + * so we can simply convert the resource address, without remapping + */ + nmk_chip->sleepmode = supports_sleepmode; + spin_lock_init(&nmk_chip->lock); + + chip = &nmk_chip->chip; + chip->parent = &dev->dev; + chip->request = gpiochip_generic_request; + chip->free = gpiochip_generic_free; + chip->get_direction = nmk_gpio_get_dir; + chip->direction_input = nmk_gpio_make_input; + chip->get = nmk_gpio_get_input; + chip->direction_output = nmk_gpio_make_output; + chip->set = nmk_gpio_set_output; + chip->dbg_show = nmk_gpio_dbg_show; + chip->can_sleep = false; + chip->owner = THIS_MODULE; + + girq = &chip->irq; + gpio_irq_chip_set_chip(girq, &nmk_irq_chip); + girq->parent_handler = nmk_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&dev->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_edge_irq; + + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + + ret = gpiochip_add_data(chip, nmk_chip); + if (ret) + return ret; + + platform_set_drvdata(dev, nmk_chip); + + dev_info(&dev->dev, "chip registered\n"); + + return 0; +} + +static const struct of_device_id nmk_gpio_match[] = { + { .compatible = "st,nomadik-gpio", }, + {} +}; + +static struct platform_driver nmk_gpio_driver = { + .driver = { + .name = "gpio", + .of_match_table = nmk_gpio_match, + }, + .probe = nmk_gpio_probe, +}; + +static int __init nmk_gpio_init(void) +{ + return platform_driver_register(&nmk_gpio_driver); +} +subsys_initcall(nmk_gpio_init); diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index 0fea167c283f..f47f0755a835 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -22,11 +22,10 @@ if (ARCH_U8500 || ARCH_NOMADIK) config PINCTRL_NOMADIK bool "Nomadik pin controller driver" - depends on OF && GPIOLIB + depends on OF select PINMUX select PINCONF - select OF_GPIO - select GPIOLIB_IRQCHIP + select GPIO_NOMADIK config PINCTRL_STN8815 bool "STN8815 pin controller driver" diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c index 490e0959e8be..0b4a3dd9d8c7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c index 1552222ac68e..c5a52fcaba30 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 4f7c4af4f93c..16d836157f74 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Generic GPIO driver for logic cells found in the Nomadik SoC + * Pinmux & pinconf driver for the IP block found in the Nomadik SoC. This + * depends on gpio-nomadik and some handling is intertwined; see nmk_gpio_chips + * which is used by this driver to access the GPIO banks array. * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini @@ -25,6 +27,7 @@ #include #include #include +#include /* Since we request GPIOs from ourself */ #include @@ -36,15 +39,7 @@ #include "../core.h" #include "../pinctrl-utils.h" -#include "pinctrl-nomadik.h" - -/* - * The GPIO module in the Nomadik family of Systems-on-Chip is an - * AMBA device, managing 32 pins and alternate functions. The logic block - * is currently used in the Nomadik and ux500. - * - * Symbols in this file are called "nmk_gpio" for "nomadik gpio" - */ +#include /* * pin configurations are represented by 32-bit integers: @@ -200,75 +195,6 @@ typedef unsigned long pin_cfg_t; (PIN_CFG_DEFAULT |\ (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val)) -/* - * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving - * the "gpio" namespace for generic and cross-machine functions - */ - -#define GPIO_BLOCK_SHIFT 5 -#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT) -#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) - -/* Register in the logic block */ -#define NMK_GPIO_DAT 0x00 -#define NMK_GPIO_DATS 0x04 -#define NMK_GPIO_DATC 0x08 -#define NMK_GPIO_PDIS 0x0c -#define NMK_GPIO_DIR 0x10 -#define NMK_GPIO_DIRS 0x14 -#define NMK_GPIO_DIRC 0x18 -#define NMK_GPIO_SLPC 0x1c -#define NMK_GPIO_AFSLA 0x20 -#define NMK_GPIO_AFSLB 0x24 -#define NMK_GPIO_LOWEMI 0x28 - -#define NMK_GPIO_RIMSC 0x40 -#define NMK_GPIO_FIMSC 0x44 -#define NMK_GPIO_IS 0x48 -#define NMK_GPIO_IC 0x4c -#define NMK_GPIO_RWIMSC 0x50 -#define NMK_GPIO_FWIMSC 0x54 -#define NMK_GPIO_WKS 0x58 -/* These appear in DB8540 and later ASICs */ -#define NMK_GPIO_EDGELEVEL 0x5C -#define NMK_GPIO_LEVEL 0x60 - - -/* Pull up/down values */ -enum nmk_gpio_pull { - NMK_GPIO_PULL_NONE, - NMK_GPIO_PULL_UP, - NMK_GPIO_PULL_DOWN, -}; - -/* Sleep mode */ -enum nmk_gpio_slpm { - NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_NOCHANGE, - NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, -}; - -struct nmk_gpio_chip { - struct gpio_chip chip; - void __iomem *addr; - struct clk *clk; - unsigned int bank; - void (*set_ioforce)(bool enable); - spinlock_t lock; - bool sleepmode; - /* Keep track of configured edges */ - u32 edge_rising; - u32 edge_falling; - u32 real_wake; - u32 rwimsc; - u32 fwimsc; - u32 rimsc; - u32 fimsc; - u32 pull_up; - u32 lowemi; -}; - /** * struct nmk_pinctrl - state container for the Nomadik pin controller * @dev: containing device pointer @@ -283,11 +209,10 @@ struct nmk_pinctrl { void __iomem *prcm_base; }; -static struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +/* See nmk_gpio_populate_chip() that fills this array. */ +struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; -static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); - -#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips) +DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode) @@ -304,19 +229,6 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); } -static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_slpm mode) -{ - u32 slpm; - - slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); - if (mode == NMK_GPIO_SLPM_NOCHANGE) - slpm |= BIT(offset); - else - slpm &= ~BIT(offset); - writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); -} - static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, unsigned offset, enum nmk_gpio_pull pull) { @@ -364,22 +276,6 @@ static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } -static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - if (val) - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); - else - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); -} - -static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); - __nmk_gpio_set_output(nmk_chip, offset, val); -} - static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode, bool glitch) @@ -548,7 +444,7 @@ static void nmk_gpio_glitch_slpm_init(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; unsigned int temp = slpm[i]; @@ -566,7 +462,7 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; if (!chip) @@ -578,7 +474,8 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) } } -static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) +/* Only called by gpio-nomadik but requires knowledge of struct nmk_pinctrl. */ +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) { int i; u16 reg; @@ -610,576 +507,6 @@ static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, return NMK_GPIO_ALT_C; } -/* IRQ functions */ - -static void nmk_gpio_irq_ack(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); - clk_disable(nmk_chip->clk); -} - -enum nmk_gpio_irq_type { - NORMAL, - WAKE, -}; - -static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, - int offset, enum nmk_gpio_irq_type which, - bool enable) -{ - u32 *rimscval; - u32 *fimscval; - u32 rimscreg; - u32 fimscreg; - - if (which == NORMAL) { - rimscreg = NMK_GPIO_RIMSC; - fimscreg = NMK_GPIO_FIMSC; - rimscval = &nmk_chip->rimsc; - fimscval = &nmk_chip->fimsc; - } else { - rimscreg = NMK_GPIO_RWIMSC; - fimscreg = NMK_GPIO_FWIMSC; - rimscval = &nmk_chip->rwimsc; - fimscval = &nmk_chip->fwimsc; - } - - /* we must individually set/clear the two edges */ - if (nmk_chip->edge_rising & BIT(offset)) { - if (enable) - *rimscval |= BIT(offset); - else - *rimscval &= ~BIT(offset); - writel(*rimscval, nmk_chip->addr + rimscreg); - } - if (nmk_chip->edge_falling & BIT(offset)) { - if (enable) - *fimscval |= BIT(offset); - else - *fimscval &= ~BIT(offset); - writel(*fimscval, nmk_chip->addr + fimscreg); - } -} - -static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, - int offset, bool on) -{ - /* - * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is - * disabled, since setting SLPM to 1 increases power consumption, and - * wakeup is anyhow controlled by the RIMSC and FIMSC registers. - */ - if (nmk_chip->sleepmode && on) { - __nmk_gpio_set_slpm(nmk_chip, offset, - NMK_GPIO_SLPM_WAKEUP_ENABLE); - } - - __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); -} - -static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, - struct irq_data *d, bool enable) -{ - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - - if (!(nmk_chip->real_wake & BIT(d->hwirq))) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_mask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_maskunmask(nmk_chip, d, false); - gpiochip_disable_irq(gc, irqd_to_hwirq(d)); -} - -static void nmk_gpio_irq_unmask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - gpiochip_enable_irq(gc, irqd_to_hwirq(d)); - nmk_gpio_irq_maskunmask(nmk_chip, d, true); -} - -static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - if (irqd_irq_disabled(d)) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); - - if (on) - nmk_chip->real_wake |= BIT(d->hwirq); - else - nmk_chip->real_wake &= ~BIT(d->hwirq); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - bool enabled = !irqd_irq_disabled(d); - bool wake = irqd_is_wakeup_set(d); - unsigned long flags; - - if (type & IRQ_TYPE_LEVEL_HIGH) - return -EINVAL; - if (type & IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_chip->lock, flags); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); - - nmk_chip->edge_rising &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_RISING) - nmk_chip->edge_rising |= BIT(d->hwirq); - - nmk_chip->edge_falling &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_FALLING) - nmk_chip->edge_falling |= BIT(d->hwirq); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); - - spin_unlock_irqrestore(&nmk_chip->lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static unsigned int nmk_gpio_irq_startup(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - nmk_gpio_irq_unmask(d); - return 0; -} - -static void nmk_gpio_irq_shutdown(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_mask(d); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_handler(struct irq_desc *desc) -{ - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); - - clk_enable(nmk_chip->clk); - status = readl(nmk_chip->addr + NMK_GPIO_IS); - clk_disable(nmk_chip->clk); - - while (status) { - int bit = __ffs(status); - - generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); - } - - chained_irq_exit(host_chip, desc); -} - -/* I/O Functions */ - -static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int dir; - - clk_enable(nmk_chip->clk); - - dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); - - clk_disable(nmk_chip->clk); - - if (dir) - return GPIO_LINE_DIRECTION_OUT; - - return GPIO_LINE_DIRECTION_IN; -} - -static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); - - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int value; - - clk_enable(nmk_chip->clk); - - value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - - clk_disable(nmk_chip->clk); - - return value; -} - -static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_set_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); -} - -static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_make_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); - - return 0; -} - -#ifdef CONFIG_DEBUG_FS -static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) -{ - u32 afunc, bfunc; - - clk_enable(nmk_chip->clk); - - afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); - bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); - - clk_disable(nmk_chip->clk); - - return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); -} - -static void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int mode; - bool is_out; - bool data_out; - bool pull; - const char *modes[] = { - [NMK_GPIO_ALT_GPIO] = "gpio", - [NMK_GPIO_ALT_A] = "altA", - [NMK_GPIO_ALT_B] = "altB", - [NMK_GPIO_ALT_C] = "altC", - [NMK_GPIO_ALT_C+1] = "altC1", - [NMK_GPIO_ALT_C+2] = "altC2", - [NMK_GPIO_ALT_C+3] = "altC3", - [NMK_GPIO_ALT_C+4] = "altC4", - }; - - char *label = gpiochip_dup_line_label(chip, offset); - if (IS_ERR(label)) - return; - - clk_enable(nmk_chip->clk); - is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); - pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); - data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - mode = nmk_gpio_get_mode(nmk_chip, offset); - if ((mode == NMK_GPIO_ALT_C) && pctldev) - mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); - - if (is_out) { - seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", - gpio, - label ?: "(none)", - data_out ? "hi" : "lo", - (mode < 0) ? "unknown" : modes[mode]); - } else { - int irq = chip->to_irq(chip, offset); - const int pullidx = pull ? 1 : 0; - int val; - static const char * const pulls[] = { - "none ", - "pull enabled", - }; - - seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", - gpio, - label ?: "(none)", - pulls[pullidx], - (mode < 0) ? "unknown" : modes[mode]); - - val = nmk_gpio_get_input(chip, offset); - seq_printf(s, " VAL %d", val); - - /* - * This races with request_irq(), set_irq_type(), - * and set_irq_wake() ... but those are "rare". - */ - if (irq > 0 && irq_has_action(irq)) { - char *trigger; - bool wake; - - if (nmk_chip->edge_rising & BIT(offset)) - trigger = "edge-rising"; - else if (nmk_chip->edge_falling & BIT(offset)) - trigger = "edge-falling"; - else - trigger = "edge-undefined"; - - wake = !!(nmk_chip->real_wake & BIT(offset)); - - seq_printf(s, " irq-%d %s%s", - irq, trigger, wake ? " wakeup" : ""); - } - } - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) -{ - unsigned i; - unsigned gpio = chip->base; - - for (i = 0; i < chip->ngpio; i++, gpio++) { - nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); - seq_printf(s, "\n"); - } -} - -#else -static inline void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, - struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ -} -#define nmk_gpio_dbg_show NULL -#endif - -/* - * We will allocate memory for the state container using devm* allocators - * binding to the first device reaching this point, it doesn't matter if - * it is the pin controller or GPIO driver. However we need to use the right - * platform device when looking up resources so pay attention to pdev. - */ -static struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, - struct platform_device *pdev) -{ - struct nmk_gpio_chip *nmk_chip; - struct platform_device *gpio_pdev; - struct gpio_chip *chip; - struct resource *res; - struct clk *clk; - void __iomem *base; - u32 id; - - gpio_pdev = of_find_device_by_node(np); - if (!gpio_pdev) { - pr_err("populate \"%pOFn\": device not found\n", np); - return ERR_PTR(-ENODEV); - } - if (of_property_read_u32(np, "gpio-bank", &id)) { - dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); - platform_device_put(gpio_pdev); - return ERR_PTR(-EINVAL); - } - - /* Already populated? */ - nmk_chip = nmk_gpio_chips[id]; - if (nmk_chip) { - platform_device_put(gpio_pdev); - return nmk_chip; - } - - nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); - if (!nmk_chip) { - platform_device_put(gpio_pdev); - return ERR_PTR(-ENOMEM); - } - - nmk_chip->bank = id; - chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; - chip->ngpio = NMK_GPIO_PER_CHIP; - chip->label = dev_name(&gpio_pdev->dev); - chip->parent = &gpio_pdev->dev; - - res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(base)) { - platform_device_put(gpio_pdev); - return ERR_CAST(base); - } - nmk_chip->addr = base; - - clk = clk_get(&gpio_pdev->dev, NULL); - if (IS_ERR(clk)) { - platform_device_put(gpio_pdev); - return (void *) clk; - } - clk_prepare(clk); - nmk_chip->clk = clk; - - BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); - nmk_gpio_chips[id] = nmk_chip; - return nmk_chip; -} - -static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, - gc->base, gc->base + gc->ngpio - 1); -} - -static const struct irq_chip nmk_irq_chip = { - .irq_ack = nmk_gpio_irq_ack, - .irq_mask = nmk_gpio_irq_mask, - .irq_unmask = nmk_gpio_irq_unmask, - .irq_set_type = nmk_gpio_irq_set_type, - .irq_set_wake = nmk_gpio_irq_set_wake, - .irq_startup = nmk_gpio_irq_startup, - .irq_shutdown = nmk_gpio_irq_shutdown, - .irq_print_chip = nmk_gpio_irq_print_chip, - .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, -}; - -static int nmk_gpio_probe(struct platform_device *dev) -{ - struct device_node *np = dev->dev.of_node; - struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; - struct gpio_irq_chip *girq; - bool supports_sleepmode; - int irq; - int ret; - - nmk_chip = nmk_gpio_populate_chip(np, dev); - if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); - return PTR_ERR(nmk_chip); - } - - supports_sleepmode = - of_property_read_bool(np, "st,supports-sleepmode"); - - /* Correct platform device ID */ - dev->id = nmk_chip->bank; - - irq = platform_get_irq(dev, 0); - if (irq < 0) - return irq; - - /* - * The virt address in nmk_chip->addr is in the nomadik register space, - * so we can simply convert the resource address, without remapping - */ - nmk_chip->sleepmode = supports_sleepmode; - spin_lock_init(&nmk_chip->lock); - - chip = &nmk_chip->chip; - chip->parent = &dev->dev; - chip->request = gpiochip_generic_request; - chip->free = gpiochip_generic_free; - chip->get_direction = nmk_gpio_get_dir; - chip->direction_input = nmk_gpio_make_input; - chip->get = nmk_gpio_get_input; - chip->direction_output = nmk_gpio_make_output; - chip->set = nmk_gpio_set_output; - chip->dbg_show = nmk_gpio_dbg_show; - chip->can_sleep = false; - chip->owner = THIS_MODULE; - - girq = &chip->irq; - gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); - - ret = gpiochip_add_data(chip, nmk_chip); - if (ret) - return ret; - - platform_set_drvdata(dev, nmk_chip); - - dev_info(&dev->dev, "chip registered\n"); - - return 0; -} - static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1197,12 +524,12 @@ static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, - unsigned *npins) + unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); *pins = npct->soc->groups[selector].grp.pins; - *npins = npct->soc->groups[selector].grp.npins; + *num_pins = npct->soc->groups[selector].grp.npins; return 0; } @@ -1533,7 +860,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; - static unsigned int slpm[NUM_BANKS]; + static unsigned int slpm[NMK_MAX_BANKS]; unsigned long flags = 0; bool glitch; int ret = -EINVAL; @@ -1921,19 +1248,6 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) return 0; } -static const struct of_device_id nmk_gpio_match[] = { - { .compatible = "st,nomadik-gpio", }, - {} -}; - -static struct platform_driver nmk_gpio_driver = { - .driver = { - .name = "gpio", - .of_match_table = nmk_gpio_match, - }, - .probe = nmk_gpio_probe, -}; - static SIMPLE_DEV_PM_OPS(nmk_pinctrl_pm_ops, nmk_pinctrl_suspend, nmk_pinctrl_resume); @@ -1947,12 +1261,6 @@ static struct platform_driver nmk_pinctrl_driver = { .probe = nmk_pinctrl_probe, }; -static int __init nmk_gpio_init(void) -{ - return platform_driver_register(&nmk_gpio_driver); -} -subsys_initcall(nmk_gpio_init); - static int __init nmk_pinctrl_init(void) { return platform_driver_register(&nmk_pinctrl_driver); diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.h b/include/linux/gpio/gpio-nomadik.h similarity index 61% rename from drivers/pinctrl/nomadik/pinctrl-nomadik.h rename to include/linux/gpio/gpio-nomadik.h index 1ef2559bc571..0166ddb71f43 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -1,16 +1,74 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef PINCTRL_PINCTRL_NOMADIK_H -#define PINCTRL_PINCTRL_NOMADIK_H - -#include -#include - -#include +#ifndef __LINUX_GPIO_NOMADIK_H +#define __LINUX_GPIO_NOMADIK_H /* Package definitions */ #define PINCTRL_NMK_STN8815 0 #define PINCTRL_NMK_DB8500 1 +#define GPIO_BLOCK_SHIFT 5 +#define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT) +#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) + +/* Register in the logic block */ +#define NMK_GPIO_DAT 0x00 +#define NMK_GPIO_DATS 0x04 +#define NMK_GPIO_DATC 0x08 +#define NMK_GPIO_PDIS 0x0c +#define NMK_GPIO_DIR 0x10 +#define NMK_GPIO_DIRS 0x14 +#define NMK_GPIO_DIRC 0x18 +#define NMK_GPIO_SLPC 0x1c +#define NMK_GPIO_AFSLA 0x20 +#define NMK_GPIO_AFSLB 0x24 +#define NMK_GPIO_LOWEMI 0x28 + +#define NMK_GPIO_RIMSC 0x40 +#define NMK_GPIO_FIMSC 0x44 +#define NMK_GPIO_IS 0x48 +#define NMK_GPIO_IC 0x4c +#define NMK_GPIO_RWIMSC 0x50 +#define NMK_GPIO_FWIMSC 0x54 +#define NMK_GPIO_WKS 0x58 +/* These appear in DB8540 and later ASICs */ +#define NMK_GPIO_EDGELEVEL 0x5C +#define NMK_GPIO_LEVEL 0x60 + +/* Pull up/down values */ +enum nmk_gpio_pull { + NMK_GPIO_PULL_NONE, + NMK_GPIO_PULL_UP, + NMK_GPIO_PULL_DOWN, +}; + +/* Sleep mode */ +enum nmk_gpio_slpm { + NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_NOCHANGE, + NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, +}; + +struct nmk_gpio_chip { + struct gpio_chip chip; + void __iomem *addr; + struct clk *clk; + unsigned int bank; + void (*set_ioforce)(bool enable); + spinlock_t lock; + bool sleepmode; + /* Keep track of configured edges */ + u32 edge_rising; + u32 edge_falling; + u32 real_wake; + u32 rwimsc; + u32 fwimsc; + u32 rimsc; + u32 fimsc; + u32 pull_up; + u32 lowemi; +}; + /* Alternate functions: function C is set in hw by setting both A and B */ #define NMK_GPIO_ALT_GPIO 0 #define NMK_GPIO_ALT_A 1 @@ -104,7 +162,7 @@ struct prcm_gpiocr_altcx_pin_desc { struct nmk_function { const char *name; const char * const *groups; - unsigned ngroups; + unsigned int ngroups; }; /** @@ -141,13 +199,13 @@ struct nmk_pingroup { */ struct nmk_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; - unsigned npins; + unsigned int npins; const struct nmk_function *functions; - unsigned nfunctions; + unsigned int nfunctions; const struct nmk_pingroup *groups; - unsigned ngroups; + unsigned int ngroups; const struct prcm_gpiocr_altcx_pin_desc *altcx_pins; - unsigned npins_altcx; + unsigned int npins_altcx; const u16 *prcm_gpiocr_registers; }; @@ -177,4 +235,42 @@ nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) #endif -#endif /* PINCTRL_PINCTRL_NOMADIK_H */ +#ifdef CONFIG_PINCTRL_DB8540 + +void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc); + +#else + +static inline void +nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) +{ +} + +#endif + +struct platform_device; + +/* + * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik + * is enabled, then gpio-nomadik is enabled as well; the reverse if not always + * true. + */ +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio); +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val); +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode); +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev); + +/* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ +#ifdef CONFIG_PINCTRL_NOMADIK +extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +extern spinlock_t nmk_gpio_slpm_lock; +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, + int gpio); +#endif + +#endif /* __LINUX_GPIO_NOMADIK_H */ From ae82f5d2b18a6c6cd95f8896010b221780114cac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:05 +0100 Subject: [PATCH 07/29] pinctrl: nomadik: Kconfig: allow building with COMPILE_TEST MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PINCTRL_NOMADIK, PINCTRL_STN8815 and PINCTRL_DB8500 depend on ARCH_U8500 or ARCH_NOMADIK. Add COMPILE_TEST as an option to allow test building the driver. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-7-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index f47f0755a835..59d0d885651c 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -18,7 +18,7 @@ config PINCTRL_AB8505 endif -if (ARCH_U8500 || ARCH_NOMADIK) +if (ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST) config PINCTRL_NOMADIK bool "Nomadik pin controller driver" From 8a10b1a36db8520c4810fe80a194d5ad586febed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:06 +0100 Subject: [PATCH 08/29] pinctrl: nomadik: fix build warning (-Wformat) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix compiler warning found in the pinctrl-nomadik platform driver. GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:855:21: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 5 has type ‘size_t {aka const long unsigned int}’ [-Wformat=] Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-8-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 16d836157f74..1be0c48712b7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -871,7 +871,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, if (g->altsetting < 0) return -EINVAL; - dev_dbg(npct->dev, "enable group %s, %u pins\n", g->grp.name, g->grp.npins); + dev_dbg(npct->dev, "enable group %s, %zu pins\n", g->grp.name, g->grp.npins); /* * If we're setting altfunc C by setting both AFSLA and AFSLB to 1, From af76822683bcd72a746ea9f16d1e845852dbaf90 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:07 +0100 Subject: [PATCH 09/29] pinctrl: nomadik: fix build warning (-Wpointer-to-int-cast) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix compiler warning found in the pinctrl-nomadik platform driver. GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:1169:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-9-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 1be0c48712b7..c8d2699be985 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1176,14 +1176,14 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct device_node *prcm_np; struct nmk_pinctrl *npct; - unsigned int version = 0; + uintptr_t version = 0; int i; npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL); if (!npct) return -ENOMEM; - version = (unsigned int)device_get_match_data(&pdev->dev); + version = (uintptr_t)device_get_match_data(&pdev->dev); /* Poke in other ASIC variants here */ if (version == PINCTRL_NMK_STN8815) From dfeaf5e7f3389f975ed96297cb0faff1ca5ad060 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:08 +0100 Subject: [PATCH 10/29] pinctrl: nomadik: minimise indentation in probe MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit nmk_pinctrl_probe() iterates over each GPIO block. Use an early conditional continue to skip to the next iteration rather than indent all the loop code block. Do not change code logic. The block is changed from: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (x) { ... do work ... } } To: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (!x) continue; ... do work ... } Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-10-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index c8d2699be985..69b421bea1f4 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1203,17 +1203,16 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct nmk_gpio_chip *nmk_chip; gpio_np = of_parse_phandle(np, "nomadik-gpio-chips", i); - if (gpio_np) { - dev_info(&pdev->dev, - "populate NMK GPIO %d \"%pOFn\"\n", - i, gpio_np); - nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); - if (IS_ERR(nmk_chip)) - dev_err(&pdev->dev, - "could not populate nmk chip struct " - "- continue anyway\n"); - of_node_put(gpio_np); - } + if (!gpio_np) + continue; + + dev_info(&pdev->dev, "populate NMK GPIO %d \"%pOFn\"\n", + i, gpio_np); + nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); + if (IS_ERR(nmk_chip)) + dev_err(&pdev->dev, + "could not populate nmk chip struct - continue anyway\n"); + of_node_put(gpio_np); } prcm_np = of_parse_phandle(np, "prcm", 0); From 1a656a80ea8a6ae648e524ad67b2c712986c0481 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:09 +0100 Subject: [PATCH 11/29] pinctrl: nomadik: follow type-system kernel coding conventions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix strict checkpatch warnings relative to types. Warning types addressed: WARNING: do not add new typedefs WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: static const char * array should probably be static const char * const Total messages before: 1 errors, 40 warnings, 39 checks. Total messages after: 1 errors, 2 warnings, 38 checks. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-11-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 78 +++++++++++------------ 1 file changed, 38 insertions(+), 40 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 69b421bea1f4..bb3b4fbbfc54 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -71,8 +71,6 @@ * PIN_CFG - default config with alternate function */ -typedef unsigned long pin_cfg_t; - #define PIN_NUM_MASK 0x1ff #define PIN_NUM(x) ((x) & PIN_NUM_MASK) @@ -215,7 +213,7 @@ struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode) + unsigned int offset, int gpio_mode) { u32 afunc, bfunc; @@ -230,7 +228,7 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_pull pull) + unsigned int offset, enum nmk_gpio_pull pull) { u32 pdis; @@ -254,7 +252,7 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, - unsigned offset, bool lowemi) + unsigned int offset, bool lowemi) { bool enabled = nmk_chip->lowemi & BIT(offset); @@ -271,13 +269,13 @@ static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, - unsigned offset) + unsigned int offset) { writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode, + unsigned int offset, int gpio_mode, bool glitch) { u32 rwimsc = nmk_chip->rwimsc; @@ -304,7 +302,7 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, } static void -nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset) +nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned int offset) { u32 falling = nmk_chip->fimsc & BIT(offset); u32 rising = nmk_chip->rimsc & BIT(offset); @@ -343,7 +341,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned offset, unsigned alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -515,15 +513,15 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); return npct->soc->groups[selector].grp.name; } -static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, - const unsigned **pins, +static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, + const unsigned int **pins, unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -533,7 +531,7 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) { int i; struct nmk_gpio_chip *nmk_gpio; @@ -549,7 +547,7 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) return NULL; } -static struct gpio_chip *find_gc_from_pin(unsigned pin) +static struct gpio_chip *find_gc_from_pin(unsigned int pin) { struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); @@ -559,7 +557,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -570,8 +568,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, nmk_gpio_dbg_show_one(s, pctldev, chip, offset - chip->base, offset); } -static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, - unsigned *num_maps, const char *group, +static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, const char *function) { if (*num_maps == *reserved_maps) @@ -586,9 +584,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps, const char *group, - unsigned long *configs, unsigned num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -727,8 +725,8 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps) + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -795,9 +793,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, - struct pinctrl_map **map, unsigned *num_maps) + struct pinctrl_map **map, unsigned int *num_maps) { - unsigned reserved_maps; + unsigned int reserved_maps; struct device_node *np; int ret; @@ -835,7 +833,7 @@ static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, - unsigned function) + unsigned int function) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -843,7 +841,7 @@ static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, } static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, - unsigned function, + unsigned int function, const char * const **groups, unsigned * const num_groups) { @@ -855,8 +853,8 @@ static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, return 0; } -static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, - unsigned group) +static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, + unsigned int group) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; @@ -915,7 +913,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, for (i = 0; i < g->grp.npins; i++) { struct nmk_gpio_chip *nmk_chip; - unsigned bit; + unsigned int bit; nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); if (!nmk_chip) { @@ -968,12 +966,12 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; struct gpio_chip *chip; - unsigned bit; + unsigned int bit; if (!range) { dev_err(npct->dev, "invalid range\n"); @@ -999,7 +997,7 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1017,30 +1015,30 @@ static const struct pinmux_ops nmk_pinmux_ops = { .strict = true, }; -static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, +static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { /* Not implemented */ return -EINVAL; } -static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, - unsigned long *configs, unsigned num_configs) +static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) { - static const char *pullnames[] = { + static const char * const pullnames[] = { [NMK_GPIO_PULL_NONE] = "none", [NMK_GPIO_PULL_UP] = "up", [NMK_GPIO_PULL_DOWN] = "down", [3] /* illegal */ = "??" }; - static const char *slpmnames[] = { + static const char * const slpmnames[] = { [NMK_GPIO_SLPM_INPUT] = "input/wakeup", [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup", }; struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; - unsigned bit; - pin_cfg_t cfg; + unsigned int bit; + unsigned long cfg; int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; @@ -1057,7 +1055,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, * here we just ignore that part. It's being handled by the * framework and pinmux callback respectively. */ - cfg = (pin_cfg_t) configs[i]; + cfg = configs[i]; pull = PIN_PULL(cfg); slpm = PIN_SLPM(cfg); output = PIN_DIR(cfg); From 8e48230d6df5cbbe408a2248aba25fd87ed279a3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:10 +0100 Subject: [PATCH 12/29] pinctrl: nomadik: follow whitespace kernel coding conventions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix strict checkpatch warnings relative to whitespace. Message types addressed: ERROR: space required before the open parenthesis '(' WARNING: quoted string split across lines CHECK: Alignment should match open parenthesis CHECK: Please don't use multiple blank lines CHECK: line length of 103 exceeds 100 columns CHECK: spaces preferred around that '+' (ctx:VxV) Before: 1 errors, 2 warnings, 38 checks. After: 0 errors, 1 warnings, 16 checks. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-12-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 66 +++++++++++------------ 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index bb3b4fbbfc54..95181ab575e0 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -9,6 +9,7 @@ * Rewritten based on work by Prafulla WADASKAR * Copyright (C) 2011-2013 Linus Walleij */ + #include #include #include @@ -165,7 +166,6 @@ #define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT) #define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT) - /* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */ #define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN) #define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP) @@ -341,7 +341,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned int offset, unsigned int alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -385,7 +385,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -395,8 +395,8 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, alt_index = alt_num - 1; if (pin_desc->altcx[alt_index].used == false) { dev_warn(npct->dev, - "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", - offset, alt_num); + "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", + offset, alt_num); return; } @@ -414,7 +414,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -422,7 +422,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index]; bit = pin_desc->altcx[alt_index].control_bit; dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n", - offset, alt_index+1); + offset, alt_index + 1); nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit)); } @@ -499,7 +499,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) - return NMK_GPIO_ALT_C+i+1; + return NMK_GPIO_ALT_C + i + 1; } } return NMK_GPIO_ALT_C; @@ -513,7 +513,7 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned int selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -536,12 +536,12 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) int i; struct nmk_gpio_chip *nmk_gpio; - for(i = 0; i < NMK_MAX_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) return nmk_gpio; } return NULL; @@ -557,7 +557,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned int pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned int offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -569,8 +569,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, } static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - const char *function) + unsigned int *num_maps, const char *group, + const char *function) { if (*num_maps == *reserved_maps) return -ENOSPC; @@ -584,9 +584,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_m } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - unsigned long *configs, unsigned int num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -702,15 +702,14 @@ static const char *nmk_find_pin_name(struct pinctrl_dev *pctldev, const char *pi } static bool nmk_pinctrl_dt_get_config(struct device_node *np, - unsigned long *configs) + unsigned long *configs) { bool has_config = 0; unsigned long cfg = 0; int i, val, ret; for (i = 0; i < ARRAY_SIZE(nmk_cfg_params); i++) { - ret = of_property_read_u32(np, - nmk_cfg_params[i].property, &val); + ret = of_property_read_u32(np, nmk_cfg_params[i].property, &val); if (ret != -EINVAL) { if (nmk_dt_pin_config(i, val, &cfg) == 0) { *configs |= cfg; @@ -723,10 +722,10 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, } static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, - struct device_node *np, - struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps) + struct device_node *np, + struct pinctrl_map **map, + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -751,7 +750,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, of_property_for_each_string(np, "groups", prop, group) { ret = nmk_dt_add_map_mux(map, reserved_maps, num_maps, - group, function); + group, function); if (ret < 0) goto exit; } @@ -792,8 +791,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, } static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, - struct device_node *np_config, - struct pinctrl_map **map, unsigned int *num_maps) + struct device_node *np_config, + struct pinctrl_map **map, + unsigned int *num_maps) { unsigned int reserved_maps; struct device_node *np; @@ -805,7 +805,7 @@ static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, for_each_child_of_node(np_config, np) { ret = nmk_pinctrl_dt_subnode_to_map(pctldev, np, map, - &reserved_maps, num_maps); + &reserved_maps, num_maps); if (ret < 0) { pinctrl_utils_free_map(pctldev, *map, *num_maps); of_node_put(np); @@ -922,7 +922,8 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->grp.name, i); goto out_glitch; } - dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->grp.pins[i], g->altsetting); + dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", + g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; @@ -936,7 +937,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, nmk_gpio_disable_lazy_irq(nmk_chip, bit); __nmk_gpio_set_mode_safe(nmk_chip, bit, - (g->altsetting & NMK_GPIO_ALT_C), glitch); + (g->altsetting & NMK_GPIO_ALT_C), glitch); clk_disable(nmk_chip->clk); /* @@ -949,7 +950,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, */ if ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C) nmk_prcm_altcx_set_mode(npct, g->grp.pins[i], - g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); + g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); } /* When all pins are successfully reconfigured we get here */ @@ -1221,8 +1222,7 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) if (!npct->prcm_base) { if (version == PINCTRL_NMK_STN8815) { dev_info(&pdev->dev, - "No PRCM base, " - "assuming no ALT-Cx control is available\n"); + "No PRCM base, assuming no ALT-Cx control is available\n"); } else { dev_err(&pdev->dev, "missing PRCM base address\n"); return -EINVAL; From cbb24db148849fd5a54063862c4f537776c92a60 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:11 +0100 Subject: [PATCH 13/29] pinctrl: nomadik: follow conditional kernel coding conventions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix strict checkpatch warnings relative to if-else blocks and bool expressions. Message types addressed: CHECK: Comparison to NULL could be written "!nmk_cfg_params[index].choice" CHECK: Unbalanced braces around else statement CHECK: Using comparison to false is error prone CHECK: Using comparison to true is error prone CHECK: braces {} should be used on all arms of this statement Before: 0 errors, 1 warnings, 16 checks. After: 0 errors, 1 warnings, 7 checks. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-13-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 95181ab575e0..b74378302229 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -378,7 +378,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, */ if (!alt_num) { for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -393,7 +393,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, } alt_index = alt_num - 1; - if (pin_desc->altcx[alt_index].used == false) { + if (!pin_desc->altcx[alt_index].used) { dev_warn(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", offset, alt_num); @@ -407,7 +407,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { if (i == alt_index) continue; - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -495,7 +495,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi pin_desc = npct->soc->altcx_pins + i; gpiocr_regs = npct->soc->prcm_gpiocr_registers; for (i = 0; i < PRCM_IDX_GPIOCR_ALTC_MAX; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) @@ -677,9 +677,9 @@ static const struct nmk_cfg_param nmk_cfg_params[] = { static int nmk_dt_pin_config(int index, int val, unsigned long *config) { - if (nmk_cfg_params[index].choice == NULL) + if (!nmk_cfg_params[index].choice) { *config = nmk_cfg_params[index].config; - else { + } else { /* test if out of range */ if (val < nmk_cfg_params[index].size) { *config = nmk_cfg_params[index].config | @@ -1105,9 +1105,9 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, if (gpiomode) /* No glitch when going to GPIO mode */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); - if (output) + if (output) { __nmk_gpio_make_output(nmk_chip, bit, val); - else { + } else { __nmk_gpio_make_input(nmk_chip, bit); __nmk_gpio_set_pull(nmk_chip, bit, pull); } From 9b82653dee91d459b650779a7d682dc1686eaba9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:12 +0100 Subject: [PATCH 14/29] gpio: nomadik: add #include MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add linux/slab.h header include for GFP flags. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-14-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index e39477e1a58f..9347c93af62c 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include From 0b95fcd1f42f0ff5d0464e6a0f577b883fc20a4b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:13 +0100 Subject: [PATCH 15/29] gpio: nomadik: replace of_find_*() by bus_find_device_by_of_node() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Avoid OF APIs in the GPIO subsystem. Here, replace of_find_device_by_node() call by bus_find_device_by_of_node(). The new helper returns a struct device pointer. Store it in a new local variable and use it down the road. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-15-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 9347c93af62c..f3ef3b4d08eb 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -483,17 +483,20 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct device *gpio_dev; struct gpio_chip *chip; struct resource *res; struct clk *clk; void __iomem *base; u32 id; - gpio_pdev = of_find_device_by_node(np); - if (!gpio_pdev) { + gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); + if (!gpio_dev) { pr_err("populate \"%pOFn\": device not found\n", np); return ERR_PTR(-ENODEV); } + gpio_pdev = to_platform_device(gpio_dev); + if (of_property_read_u32(np, "gpio-bank", &id)) { dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); platform_device_put(gpio_pdev); @@ -519,8 +522,8 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, chip = &nmk_chip->chip; chip->base = id * NMK_GPIO_PER_CHIP; chip->ngpio = NMK_GPIO_PER_CHIP; - chip->label = dev_name(&gpio_pdev->dev); - chip->parent = &gpio_pdev->dev; + chip->label = dev_name(gpio_dev); + chip->parent = gpio_dev; res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(&pdev->dev, res); @@ -530,7 +533,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = clk_get(&gpio_pdev->dev, NULL); + clk = clk_get(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From be0552e1f4bfade2b27830e8b2f587c395baf39d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:14 +0100 Subject: [PATCH 16/29] gpio: nomadik: replace of_property_read_*() by device_property_read_*() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Avoid OF APIs in the GPIO subsystem. Here, replace of_property_read_{u32,bool}() call by device_property_read_{u32,bool}(). Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-16-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index f3ef3b4d08eb..bba183c0b597 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -497,7 +497,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } gpio_pdev = to_platform_device(gpio_dev); - if (of_property_read_u32(np, "gpio-bank", &id)) { + if (device_property_read_u32(gpio_dev, "gpio-bank", &id)) { dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); platform_device_put(gpio_pdev); return ERR_PTR(-EINVAL); @@ -587,7 +587,7 @@ static int nmk_gpio_probe(struct platform_device *dev) } supports_sleepmode = - of_property_read_bool(np, "st,supports-sleepmode"); + device_property_read_bool(dev, "st,supports-sleepmode"); /* Correct platform device ID */ dev->id = nmk_chip->bank; From 12410e95903c68573aa43ea6f816830715a7e7b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:15 +0100 Subject: [PATCH 17/29] gpio: nomadik: use devm_platform_ioremap_resource() helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace calls to platform_get_resource() then devm_ioremap_resource() by a single call to devm_platform_ioremap_resource(). Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-17-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index bba183c0b597..93015fa3d010 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -485,7 +485,6 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct platform_device *gpio_pdev; struct device *gpio_dev; struct gpio_chip *chip; - struct resource *res; struct clk *clk; void __iomem *base; u32 id; @@ -525,8 +524,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; - res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) { platform_device_put(gpio_pdev); return ERR_CAST(base); From 2f8875ddd13ae797edc45384f56ecc8a9496d2ca Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:16 +0100 Subject: [PATCH 18/29] gpio: nomadik: use devres version of clk_get*() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace call to clk_get() by call to devm_clk_get(). Allow automatic cleanup of the clock in case of probe error. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-18-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 93015fa3d010..fb821a9b6c5f 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -531,7 +531,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = clk_get(gpio_dev, NULL); + clk = devm_clk_get(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From 75d270fda64d4e12d0ce35334bca6d674cd7b943 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:17 +0100 Subject: [PATCH 19/29] gpio: nomadik: request dynamic ID allocation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move away from statically allocated GPIO IDs. Switch to dynamic ID allocation. Static IDs are deprecated because they cause issues when multiple GPIO controllers are to be found on the same platform. Add a bit of complexity to do pin number -> GPIO chip + offset. Previously, bank number and offsets were retrieved using division and remainder (bank size being constant 32). Now, to get the pin number matching a bank base, we must know the sum of ngpios of previous banks. This is done in find_nmk_gpio_from_pin() which also exposes the offset inside the bank. Also remove the assumption that bank sizes are constant. Instead of using NMK_GPIO_PER_CHIP as bank size, use nmk_gpio_chips[i]->ngpio. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-19-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 2 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 54 +++++++++++++++-------- 2 files changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index fb821a9b6c5f..b7d76cc901dc 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -519,7 +519,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, nmk_chip->bank = id; chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; + chip->base = -1; chip->ngpio = NMK_GPIO_PER_CHIP; chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index b74378302229..5633f0ec2715 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -531,25 +531,33 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) +/* This makes the mapping from pin number to a GPIO chip. We also return the pin + * offset in the GPIO chip for convenience (and to avoid a second loop). + */ +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin, + unsigned int *offset) { - int i; + int i, j = 0; struct nmk_gpio_chip *nmk_gpio; + /* We assume that pins are allocated in bank order. */ for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; - if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + if (pin >= j && pin < j + nmk_gpio->chip.ngpio) { + if (offset) + *offset = pin - j; return nmk_gpio; + } + j += nmk_gpio->chip.ngpio; } return NULL; } static struct gpio_chip *find_gc_from_pin(unsigned int pin) { - struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); + struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin, NULL); if (nmk_gpio) return &nmk_gpio->chip; @@ -905,8 +913,18 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, * switching to the ALT C function. */ for (i = 0; i < g->grp.npins; i++) { - unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + struct nmk_gpio_chip *nmk_chip; + unsigned int bit; + + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); + if (!nmk_chip) { + dev_err(npct->dev, + "invalid pin offset %d in group %s at index %d\n", + g->grp.pins[i], g->grp.name, i); + goto out_pre_slpm_init; + } + + slpm[nmk_chip->bank] &= ~BIT(bit); } nmk_gpio_glitch_slpm_init(slpm); } @@ -915,7 +933,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, struct nmk_gpio_chip *nmk_chip; unsigned int bit; - nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d in group %s at index %d\n", @@ -926,7 +944,6 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); - bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; /* * If the pin is switching to altfunc, and there was an * interrupt installed on it which has been lazy disabled, @@ -957,17 +974,18 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, ret = 0; out_glitch: - if (glitch) { + if (glitch) nmk_gpio_glitch_slpm_restore(slpm); +out_pre_slpm_init: + if (glitch) spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - } return ret; } static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; @@ -985,10 +1003,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, chip = range->gc; nmk_chip = gpiochip_get_data(chip); - dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "enable pin %u as GPIO\n", pin); + + find_nmk_gpio_from_pin(pin, &bit); clk_enable(nmk_chip->clk); - bit = offset % NMK_GPIO_PER_CHIP; /* There is no glitch when converting any pin to GPIO */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); clk_disable(nmk_chip->clk); @@ -998,11 +1017,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); - dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "disable pin %u as GPIO\n", pin); /* Set the pin to some default state, GPIO is usually default */ } @@ -1043,7 +1062,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; - nmk_chip = find_nmk_gpio_from_pin(pin); + nmk_chip = find_nmk_gpio_from_pin(pin, &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d\n", pin); @@ -1101,7 +1120,6 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, lowemi ? "on" : "off"); clk_enable(nmk_chip->clk); - bit = pin % NMK_GPIO_PER_CHIP; if (gpiomode) /* No glitch when going to GPIO mode */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); From eac86aaed7f7b548a2654ba1dbf12b5a3e83a470 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:18 +0100 Subject: [PATCH 20/29] gpio: nomadik: make clock optional MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not all platforms using this platform driver expose a clock for this GPIO controller. Turn devm_clk_get() into devm_clk_get_optional() to avoid failing when no clocks are provided. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-20-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index b7d76cc901dc..3ccbb731cb68 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -531,7 +531,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = devm_clk_get(gpio_dev, NULL); + clk = devm_clk_get_optional(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From 98c031faa631fdc74c813265c32d54c49a764fb6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:19 +0100 Subject: [PATCH 21/29] gpio: nomadik: change driver name from gpio to nomadik-gpio MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This GPIO driver is historically related to the Nomadik platform. It however can be used by others as it implements the ST STA2X11 IP block. Pick a less ambiguous name for it. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-21-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 3ccbb731cb68..c22a0864ca70 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -649,7 +649,7 @@ static const struct of_device_id nmk_gpio_match[] = { static struct platform_driver nmk_gpio_driver = { .driver = { - .name = "gpio", + .name = "nomadik-gpio", .of_match_table = nmk_gpio_match, }, .probe = nmk_gpio_probe, From 8d74c3dc8f99d9867254004ed49508c13295cacd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:20 +0100 Subject: [PATCH 22/29] gpio: nomadik: support shared GPIO IRQs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Support a single IRQs used by multiple GPIO banks. Change the IRQ handler type from a chained handler (as used by gpiolib for ->parent_handler) to a threaded IRQ. Use the generic_handle_domain_irq_safe() helper. The non-safe version must be called in a no-IRQ context. The Mobileye EyeQ5 platform uses this GPIO controller and share an IRQ for its two banks. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-22-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 68 ++++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index c22a0864ca70..ca5c28965224 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -255,27 +255,28 @@ static void nmk_gpio_irq_shutdown(struct irq_data *d) clk_disable(nmk_chip->clk); } -static void nmk_gpio_irq_handler(struct irq_desc *desc) +static irqreturn_t nmk_gpio_irq_handler(int irq, void *dev_id) { - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); + struct nmk_gpio_chip *nmk_chip = dev_id; + struct gpio_chip *chip = &nmk_chip->chip; + unsigned long mask = GENMASK(chip->ngpio - 1, 0); + unsigned long status; + int bit; clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); + + /* Ensure we cannot leave pending bits; this should never occur. */ + if (unlikely(status & ~mask)) + writel(status & ~mask, nmk_chip->addr + NMK_GPIO_IC); + clk_disable(nmk_chip->clk); - while (status) { - int bit = __ffs(status); + for_each_set_bit(bit, &status, chip->ngpio) + generic_handle_domain_irq_safe(chip->irq.domain, bit); - generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); - } - - chained_irq_exit(host_chip, desc); + return IRQ_RETVAL((status & mask) != 0); } /* I/O Functions */ @@ -568,19 +569,20 @@ static const struct irq_chip nmk_irq_chip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static int nmk_gpio_probe(struct platform_device *dev) +static int nmk_gpio_probe(struct platform_device *pdev) { - struct device_node *np = dev->dev.of_node; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; struct gpio_irq_chip *girq; bool supports_sleepmode; + struct gpio_chip *chip; int irq; int ret; - nmk_chip = nmk_gpio_populate_chip(np, dev); + nmk_chip = nmk_gpio_populate_chip(np, pdev); if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); + dev_err(dev, "could not populate nmk chip struct\n"); return PTR_ERR(nmk_chip); } @@ -588,9 +590,9 @@ static int nmk_gpio_probe(struct platform_device *dev) device_property_read_bool(dev, "st,supports-sleepmode"); /* Correct platform device ID */ - dev->id = nmk_chip->bank; + pdev->id = nmk_chip->bank; - irq = platform_get_irq(dev, 0); + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -602,7 +604,7 @@ static int nmk_gpio_probe(struct platform_device *dev) spin_lock_init(&nmk_chip->lock); chip = &nmk_chip->chip; - chip->parent = &dev->dev; + chip->parent = dev; chip->request = gpiochip_generic_request; chip->free = gpiochip_generic_free; chip->get_direction = nmk_gpio_get_dir; @@ -616,17 +618,19 @@ static int nmk_gpio_probe(struct platform_device *dev) girq = &chip->irq; gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; + girq->parent_handler = NULL; + girq->num_parents = 0; + girq->parents = NULL; girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_edge_irq; + ret = devm_request_irq(dev, irq, nmk_gpio_irq_handler, IRQF_SHARED, + dev_name(dev), nmk_chip); + if (ret) { + dev_err(dev, "failed requesting IRQ\n"); + return ret; + } + clk_enable(nmk_chip->clk); nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); clk_disable(nmk_chip->clk); @@ -635,9 +639,9 @@ static int nmk_gpio_probe(struct platform_device *dev) if (ret) return ret; - platform_set_drvdata(dev, nmk_chip); + platform_set_drvdata(pdev, nmk_chip); - dev_info(&dev->dev, "chip registered\n"); + dev_info(dev, "chip registered\n"); return 0; } From 50bc2a4953cceb70f90d37fd513dd1231367aa4d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:21 +0100 Subject: [PATCH 23/29] gpio: nomadik: handle variadic GPIO count MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Read the "ngpios" property to determine the number of GPIOs for a bank. If not available, fallback to NMK_GPIO_PER_CHIP ie 32 ie the current behavior. The IP block always supports 32 GPIOs, but platforms can expose a lesser amount. The Mobileye EyeQ5 is in this case; one bank is 29 GPIOs and the other is 23. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-23-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index ca5c28965224..19394dc7e34a 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -488,7 +488,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct gpio_chip *chip; struct clk *clk; void __iomem *base; - u32 id; + u32 id, ngpio; gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); if (!gpio_dev) { @@ -518,10 +518,15 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, return ERR_PTR(-ENOMEM); } + if (device_property_read_u32(gpio_dev, "ngpios", &ngpio)) { + ngpio = NMK_GPIO_PER_CHIP; + dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); + } + nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; - chip->ngpio = NMK_GPIO_PER_CHIP; + chip->ngpio = ngpio; chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; From 3c30cc26df0a3fc50b1f3fe4fd3a9b19a1704d95 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:22 +0100 Subject: [PATCH 24/29] gpio: nomadik: support mobileye,eyeq5-gpio MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We create a custom compatible for the STA2X11 IP block as integrated into the Mobileye EyeQ5 platform. Its wake and alternate functions have been disabled, we want to avoid touching those registers. We both do: (1) early return in functions that do not support the platform, but with warnings, and (2) avoid calling those functions in the first place. We ensure that pinctrl-nomadik is not used with this STA2X11 variant. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-24-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 5 +-- drivers/gpio/gpio-nomadik.c | 42 +++++++++++++++++++---- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 ++ include/linux/gpio/gpio-nomadik.h | 1 + 4 files changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ff83371251c1..fe6112abb73a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -480,11 +480,12 @@ config GPIO_MXS config GPIO_NOMADIK bool "Nomadik GPIO driver" - depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + depends on ARCH_U8500 || ARCH_NOMADIK || MACH_EYEQ5 || COMPILE_TEST select OF_GPIO select GPIOLIB_IRQCHIP help - Say yes here to support the Nomadik SoC GPIO block. + Say yes here to support the Nomadik SoC GPIO block. This block is also + used by the Mobileye EyeQ5 SoC. It handles up to 32 GPIOs per bank, that can all be interrupt sources. It is deeply interconnected with the associated pinctrl driver as GPIO diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 19394dc7e34a..6adb3c4417d3 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -7,6 +7,12 @@ * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for * pinmuxing functionality and others. * + * This driver also handles the mobileye,eyeq5-gpio compatible. It is an STA2X11 + * but with only data, direction and interrupts register active. We want to + * avoid touching SLPM, RWIMSC, FWIMSC, AFSLA and AFSLB registers; that is, + * wake and alternate function registers. It is NOT compatible with + * pinctrl-nomadik. + * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini * Rewritten based on work by Prafulla WADASKAR @@ -37,6 +43,10 @@ void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, { u32 slpm; + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); if (mode == NMK_GPIO_SLPM_NOCHANGE) slpm |= BIT(offset); @@ -93,6 +103,9 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, rimscval = &nmk_chip->rimsc; fimscval = &nmk_chip->fimsc; } else { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; rimscreg = NMK_GPIO_RWIMSC; fimscreg = NMK_GPIO_FWIMSC; rimscval = &nmk_chip->rwimsc; @@ -119,6 +132,10 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, int offset, bool on) { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; + /* * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is * disabled, since setting SLPM to 1 increases power consumption, and @@ -143,7 +160,7 @@ static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - if (!(nmk_chip->real_wake & BIT(d->hwirq))) + if (!nmk_chip->is_mobileye_soc && !(nmk_chip->real_wake & BIT(d->hwirq))) __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); spin_unlock(&nmk_chip->lock); @@ -175,6 +192,10 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); unsigned long flags; + /* Handler is registered in all cases. */ + if (nmk_chip->is_mobileye_soc) + return -ENXIO; + clk_enable(nmk_chip->clk); spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); @@ -213,7 +234,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - if (enabled || wake) + if (!nmk_chip->is_mobileye_soc && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); nmk_chip->edge_rising &= ~BIT(d->hwirq); @@ -227,7 +248,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - if (enabled || wake) + if (!nmk_chip->is_mobileye_soc && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); spin_unlock_irqrestore(&nmk_chip->lock, flags); @@ -357,6 +378,10 @@ static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) { u32 afunc, bfunc; + /* We don't support modes. */ + if (nmk_chip->is_mobileye_soc) + return NMK_GPIO_ALT_GPIO; + clk_enable(nmk_chip->clk); afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); @@ -523,6 +548,8 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); } + nmk_chip->is_mobileye_soc = device_is_compatible(gpio_dev, + "mobileye,eyeq5-gpio"); nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; @@ -636,9 +663,11 @@ static int nmk_gpio_probe(struct platform_device *pdev) return ret; } - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); + if (!nmk_chip->is_mobileye_soc) { + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + } ret = gpiochip_add_data(chip, nmk_chip); if (ret) @@ -653,6 +682,7 @@ static int nmk_gpio_probe(struct platform_device *pdev) static const struct of_device_id nmk_gpio_match[] = { { .compatible = "st,nomadik-gpio", }, + { .compatible = "mobileye,eyeq5-gpio", }, {} }; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 5633f0ec2715..7849144b3b80 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1230,6 +1230,8 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) dev_err(&pdev->dev, "could not populate nmk chip struct - continue anyway\n"); of_node_put(gpio_np); + /* We are NOT compatible with mobileye,eyeq5-gpio. */ + BUG_ON(nmk_chip->is_mobileye_soc); } prcm_np = of_parse_phandle(np, "prcm", 0); diff --git a/include/linux/gpio/gpio-nomadik.h b/include/linux/gpio/gpio-nomadik.h index 0166ddb71f43..9bdb09fda4c9 100644 --- a/include/linux/gpio/gpio-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -57,6 +57,7 @@ struct nmk_gpio_chip { void (*set_ioforce)(bool enable); spinlock_t lock; bool sleepmode; + bool is_mobileye_soc; /* Keep track of configured edges */ u32 edge_rising; u32 edge_falling; From 6ad679cfaeea9291e9dce3247e34656080fc1d29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 28 Feb 2024 12:28:23 +0100 Subject: [PATCH 25/29] gpio: nomadik: grab optional reset control and deassert it at probe MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fetch a reference to the optional shared reset control and deassert it if it exists. Optional because not all platforms that use this driver have a reset attached to the reset block. Shared because some platforms that use the reset (at least Mobileye EyeQ5) share the reset across banks. Do not keep a reference to the reset control as it is not needed afterwards; the driver does not handle suspend, does not use runtime PM, does not register a remove callback and does not support unbinding from sysfs (made explicit with suppress_bind_attrs). The operation is done in nmk_gpio_populate_chip(). This function is called by either gpio-nomadik or pinctrl-nomadik, whoever comes first. This is here for historic reasons and could probably be removed now; it seems gpio-ranges enforces the ordering to be pinctrl-first. It is not the topic of the present patch however. Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-25-3ba757474006@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 6adb3c4417d3..c9fd6631e0aa 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -509,11 +509,13 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct reset_control *reset; struct device *gpio_dev; struct gpio_chip *chip; struct clk *clk; void __iomem *base; u32 id, ngpio; + int ret; gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); if (!gpio_dev) { @@ -572,6 +574,24 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, clk_prepare(clk); nmk_chip->clk = clk; + reset = devm_reset_control_get_optional_shared(gpio_dev, NULL); + if (IS_ERR(reset)) { + dev_err(&pdev->dev, "failed getting reset control: %ld\n", + PTR_ERR(reset)); + return ERR_CAST(reset); + } + + /* + * Reset might be shared and asserts/deasserts calls are unbalanced. We + * only support sharing this reset with other gpio-nomadik devices that + * use this reset to ensure deassertion at probe. + */ + ret = reset_control_deassert(reset); + if (ret) { + dev_err(&pdev->dev, "failed reset deassert: %d\n", ret); + return ERR_PTR(ret); + } + #ifdef CONFIG_PINCTRL_NOMADIK BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); nmk_gpio_chips[id] = nmk_chip; @@ -690,6 +710,7 @@ static struct platform_driver nmk_gpio_driver = { .driver = { .name = "nomadik-gpio", .of_match_table = nmk_gpio_match, + .suppress_bind_attrs = true, }, .probe = nmk_gpio_probe, }; From b824f841a4a8442f626fedeafb3c8fcfb7bef823 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Fri, 1 Mar 2024 11:39:26 +0100 Subject: [PATCH 26/29] gpio: nomadik: fix Kconfig dependencies inbetween pinctrl & GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PINCTRL_NOMADIK cannot select GPIO_NOMADIK without first selecting GPIOLIB on which GPIO_NOMADIK depends. GPIO_NOMADIK depends on OF_GPIO, it is a direct dependency. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202403010917.pnDhdS1Y-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202403011102.v8w2zPOU-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202403011329.1VnABMRz-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202403011546.Hpt8sBTa-lkp@intel.com/ Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240301-mbly-gpio-kconfig-fix-v1-1-2785cebd475d@bootlin.com Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 2 +- drivers/pinctrl/nomadik/Kconfig | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index fe6112abb73a..f633be517654 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -481,7 +481,7 @@ config GPIO_MXS config GPIO_NOMADIK bool "Nomadik GPIO driver" depends on ARCH_U8500 || ARCH_NOMADIK || MACH_EYEQ5 || COMPILE_TEST - select OF_GPIO + depends on OF_GPIO select GPIOLIB_IRQCHIP help Say yes here to support the Nomadik SoC GPIO block. This block is also diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index 59d0d885651c..aafecf348670 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -25,6 +25,7 @@ config PINCTRL_NOMADIK depends on OF select PINMUX select PINCONF + select GPIOLIB select GPIO_NOMADIK config PINCTRL_STN8815 From caddc92c57451d983c7e31e60b961c5aae4ece63 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Sat, 2 Mar 2024 19:33:29 +0200 Subject: [PATCH 27/29] gpio: nomadik: Finish conversion to use firmware node APIs Previously driver got a few updates in order to replace OF APIs by respective firmware node, however it was not finished to the logical end, e.g., some APIs that has been used are still require OF node to be passed. Finish that job by converting leftovers to use firmware node APIs. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240302173401.217830-1-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 1 - drivers/gpio/gpio-nomadik.c | 13 ++++++------ drivers/pinctrl/nomadik/pinctrl-nomadik.c | 25 +++++++++++------------ include/linux/gpio/gpio-nomadik.h | 4 +++- 4 files changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index f633be517654..ef20ab921010 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -481,7 +481,6 @@ config GPIO_MXS config GPIO_NOMADIK bool "Nomadik GPIO driver" depends on ARCH_U8500 || ARCH_NOMADIK || MACH_EYEQ5 || COMPILE_TEST - depends on OF_GPIO select GPIOLIB_IRQCHIP help Say yes here to support the Nomadik SoC GPIO block. This block is also diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index c9fd6631e0aa..483086deb397 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -23,10 +23,10 @@ #include #include #include -#include -#include +#include #include #include +#include #include #include #include @@ -504,7 +504,7 @@ static inline void nmk_gpio_dbg_show_one(struct seq_file *s, * it is the pin controller or GPIO driver. However we need to use the right * platform device when looking up resources so pay attention to pdev. */ -struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, struct platform_device *pdev) { struct nmk_gpio_chip *nmk_chip; @@ -517,9 +517,9 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, u32 id, ngpio; int ret; - gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); + gpio_dev = bus_find_device_by_fwnode(&platform_bus_type, fwnode); if (!gpio_dev) { - pr_err("populate \"%pOFn\": device not found\n", np); + dev_err(&pdev->dev, "populate \"%pfwP\": device not found\n", fwnode); return ERR_PTR(-ENODEV); } gpio_pdev = to_platform_device(gpio_dev); @@ -624,7 +624,6 @@ static const struct irq_chip nmk_irq_chip = { static int nmk_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; struct nmk_gpio_chip *nmk_chip; struct gpio_irq_chip *girq; bool supports_sleepmode; @@ -632,7 +631,7 @@ static int nmk_gpio_probe(struct platform_device *pdev) int irq; int ret; - nmk_chip = nmk_gpio_populate_chip(np, pdev); + nmk_chip = nmk_gpio_populate_chip(dev_fwnode(dev), pdev); if (IS_ERR(nmk_chip)) { dev_err(dev, "could not populate nmk chip struct\n"); return PTR_ERR(nmk_chip); diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 7849144b3b80..47d5484f6bdf 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1190,8 +1190,8 @@ static int nmk_pinctrl_resume(struct device *dev) static int nmk_pinctrl_probe(struct platform_device *pdev) { - struct device_node *np = pdev->dev.of_node; - struct device_node *prcm_np; + struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev); + struct fwnode_handle *prcm_fwnode; struct nmk_pinctrl *npct; uintptr_t version = 0; int i; @@ -1216,28 +1216,27 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) * or after this point: it shouldn't matter as the APIs are orthogonal. */ for (i = 0; i < NMK_MAX_BANKS; i++) { - struct device_node *gpio_np; + struct fwnode_handle *gpio_fwnode; struct nmk_gpio_chip *nmk_chip; - gpio_np = of_parse_phandle(np, "nomadik-gpio-chips", i); - if (!gpio_np) + gpio_fwnode = fwnode_find_reference(fwnode, "nomadik-gpio-chips", i); + if (IS_ERR(gpio_fwnode)) continue; - dev_info(&pdev->dev, "populate NMK GPIO %d \"%pOFn\"\n", - i, gpio_np); - nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); + dev_info(&pdev->dev, "populate NMK GPIO %d \"%pfwP\"\n", i, gpio_fwnode); + nmk_chip = nmk_gpio_populate_chip(gpio_fwnode, pdev); if (IS_ERR(nmk_chip)) dev_err(&pdev->dev, "could not populate nmk chip struct - continue anyway\n"); - of_node_put(gpio_np); + fwnode_handle_put(gpio_fwnode); /* We are NOT compatible with mobileye,eyeq5-gpio. */ BUG_ON(nmk_chip->is_mobileye_soc); } - prcm_np = of_parse_phandle(np, "prcm", 0); - if (prcm_np) { - npct->prcm_base = of_iomap(prcm_np, 0); - of_node_put(prcm_np); + prcm_fwnode = fwnode_find_reference(fwnode, "prcm", 0); + if (!IS_ERR(prcm_fwnode)) { + npct->prcm_base = fwnode_iomap(prcm_fwnode, 0); + fwnode_handle_put(prcm_fwnode); } if (!npct->prcm_base) { if (version == PINCTRL_NMK_STN8815) { diff --git a/include/linux/gpio/gpio-nomadik.h b/include/linux/gpio/gpio-nomadik.h index 9bdb09fda4c9..4a95ea7935fb 100644 --- a/include/linux/gpio/gpio-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -2,6 +2,8 @@ #ifndef __LINUX_GPIO_NOMADIK_H #define __LINUX_GPIO_NOMADIK_H +struct fwnode_handle; + /* Package definitions */ #define PINCTRL_NMK_STN8815 0 #define PINCTRL_NMK_DB8500 1 @@ -263,7 +265,7 @@ void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, unsigned int offset, int val); void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, enum nmk_gpio_slpm mode); -struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, struct platform_device *pdev); /* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ From 5545d5013c0ec96f2a920bdfc681cdd72a570dd8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 5 Mar 2024 23:09:04 +0100 Subject: [PATCH 28/29] gpio: nomadik: Back out some managed resources MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Several commits introduce managed resources (devm_*) into the nmk_gpio_populate_chip() function. This isn't always working because when called from the Nomadik pin control driver we just want to populate some states for the device as the same states are used by the pin control driver. Some managed resources such as devm_kzalloc() etc will work, as the passed in platform device will be used for lifecycle management, but in some cases where we used the looked-up platform device for the GPIO block, this will cause problems for the combined pin control and GPIO driver, because it adds managed resources to the GPIO device before it is probed, which is something that the device core will not accept, and all of the GPIO blocks will refuse to probe: platform 8012e000.gpio: Resources present before probing platform 8012e080.gpio: Resources present before probing (...) Fix this by not tying any managed resources to the looked-up gpio_pdev/gpio_dev device, let's just live with the fact that these need imperative resource management for now. Drop in some notes and use a local *dev variable to clarify the code. Cc: Théo Lebrun Fixes: 12410e95903c ("gpio: nomadik: use devm_platform_ioremap_resource() helper") Link: https://lore.kernel.org/r/20240305-fix-nomadik-gpio-v2-1-e5d1fbdc3f5c@linaro.org [Fixed some last minut print formatting] Signed-off-by: Linus Walleij --- drivers/gpio/gpio-nomadik.c | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 483086deb397..463a765620dc 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -509,9 +509,11 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct device *dev = &pdev->dev; struct reset_control *reset; struct device *gpio_dev; struct gpio_chip *chip; + struct resource *res; struct clk *clk; void __iomem *base; u32 id, ngpio; @@ -519,13 +521,13 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, gpio_dev = bus_find_device_by_fwnode(&platform_bus_type, fwnode); if (!gpio_dev) { - dev_err(&pdev->dev, "populate \"%pfwP\": device not found\n", fwnode); + dev_err(dev, "populate \"%pfwP\": device not found\n", fwnode); return ERR_PTR(-ENODEV); } gpio_pdev = to_platform_device(gpio_dev); if (device_property_read_u32(gpio_dev, "gpio-bank", &id)) { - dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); + dev_err(dev, "populate: gpio-bank property not found\n"); platform_device_put(gpio_pdev); return ERR_PTR(-EINVAL); } @@ -539,7 +541,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, } #endif - nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); + nmk_chip = devm_kzalloc(dev, sizeof(*nmk_chip), GFP_KERNEL); if (!nmk_chip) { platform_device_put(gpio_pdev); return ERR_PTR(-ENOMEM); @@ -547,7 +549,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, if (device_property_read_u32(gpio_dev, "ngpios", &ngpio)) { ngpio = NMK_GPIO_PER_CHIP; - dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); + dev_dbg(dev, "populate: using default ngpio (%u)\n", ngpio); } nmk_chip->is_mobileye_soc = device_is_compatible(gpio_dev, @@ -559,25 +561,32 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; - base = devm_platform_ioremap_resource(pdev, 0); + /* NOTE: different devices! No devm_platform_ioremap_resource() here! */ + res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, res); if (IS_ERR(base)) { platform_device_put(gpio_pdev); return ERR_CAST(base); } nmk_chip->addr = base; - clk = devm_clk_get_optional(gpio_dev, NULL); + /* NOTE: do not use devm_ here! */ + clk = clk_get_optional(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); - return (void *)clk; + return ERR_CAST(clk); } clk_prepare(clk); nmk_chip->clk = clk; - reset = devm_reset_control_get_optional_shared(gpio_dev, NULL); + /* NOTE: do not use devm_ here! */ + reset = reset_control_get_optional_shared(gpio_dev, NULL); if (IS_ERR(reset)) { - dev_err(&pdev->dev, "failed getting reset control: %ld\n", - PTR_ERR(reset)); + clk_unprepare(clk); + clk_put(clk); + platform_device_put(gpio_pdev); + dev_err(dev, "failed getting reset control: %pe\n", + reset); return ERR_CAST(reset); } @@ -588,7 +597,11 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, */ ret = reset_control_deassert(reset); if (ret) { - dev_err(&pdev->dev, "failed reset deassert: %d\n", ret); + reset_control_put(reset); + clk_unprepare(clk); + clk_put(clk); + platform_device_put(gpio_pdev); + dev_err(dev, "failed reset deassert: %d\n", ret); return ERR_PTR(ret); } From a0c807b5b65a73b321a5313662625a85b18a7037 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Th=C3=A9o=20Lebrun?= Date: Wed, 6 Mar 2024 17:19:45 +0100 Subject: [PATCH 29/29] pinctrl: nomadik: fix dereference of error pointer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If nmk_gpio_populate_chip() returns an error, avoid deferencing its return value. Reported-by: Dan Carpenter Closes: https://lore.kernel.org/linux-gpio/5ee722f8-7582-420d-8477-45be6acde90f@moroto.mountain/ Signed-off-by: Théo Lebrun Link: https://lore.kernel.org/r/20240306-mbly-gpio-err-fix-v1-1-a3605ba2336f@bootlin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 47d5484f6bdf..cb0f0d5a5e45 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1228,9 +1228,10 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) if (IS_ERR(nmk_chip)) dev_err(&pdev->dev, "could not populate nmk chip struct - continue anyway\n"); + else + /* We are NOT compatible with mobileye,eyeq5-gpio. */ + BUG_ON(nmk_chip->is_mobileye_soc); fwnode_handle_put(gpio_fwnode); - /* We are NOT compatible with mobileye,eyeq5-gpio. */ - BUG_ON(nmk_chip->is_mobileye_soc); } prcm_fwnode = fwnode_find_reference(fwnode, "prcm", 0);