From 6487b12a875a5e3cc2f99ff7eba1112fe3f72483 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Wed, 13 May 2026 14:11:02 +0300 Subject: [PATCH] dt-bindings: cache: qcom,llcc: Document Eliza LLCC block Document the Last Level Cache Controller on Eliza SoC. Eliza LLCC has 2 base register regions and an additional AND, OR broadcast region, total 4 register regions. Signed-off-by: Abel Vesa Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20260513-eliza-llcc-v2-1-27381ae833d5@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/cache/qcom,llcc.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 1fc5411fe948..34e3a2d78592 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,eliza-llcc - qcom,glymur-llcc - qcom,hawi-llcc - qcom,ipq5424-llcc @@ -362,6 +363,27 @@ allOf: properties: memory-region: false + - if: + properties: + compatible: + contains: + enum: + - qcom,eliza-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC2 base register region + - description: LLCC broadcast OR register region + - description: LLCC broadcast AND register region + reg-names: + items: + - const: llcc0_base + - const: llcc2_base + - const: llcc_broadcast_base + - const: llcc_broadcast_and_base + additionalProperties: false examples: