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net: dsa: microchip: add periodic output support for the KSZ8463
KSZ8463 has several periodic outputs. The way it handles them differ from the other KSZ switches: - KSZ8463 has one set of registers for each of its 12 units while others switches share on set of configuration registers for all their units. - Maximum size of the KSZ8463 pulse width is smaller - KSZ8463 has 12 outputs while others only have 2 Add support for the KSZ8463 periodics outputs through a set of KSZ8463 specific functions. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260925-ksz-perout-v4-11-d675bd21ce49@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Bastien Curutchet (Schneider Electric)
Jakub Kicinski
parent
a7cc3395d1
commit
64854d9aab
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@ -2589,7 +2589,7 @@ static int ksz8463_setup(struct dsa_switch *ds)
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if (ret)
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goto free_girq;
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ksz_ptp_set_caps(ds);
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ksz8463_ptp_set_caps(ds);
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ret = ksz_ptp_clock_register(ds);
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if (ret) {
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dev_err(dev->dev, "Failed to register PTP clock: %d\n",
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@ -1175,6 +1175,8 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.supports_mii = {false, false, true},
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.supports_rmii = {false, false, true},
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.internal_phy = {true, true, false},
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.n_pins = 12,
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.n_per_out = 12,
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},
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[KSZ8563] = {
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@ -26,6 +26,7 @@
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*/
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#define KSZ_MAX_DRIFT_CORR 6249999
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#define KSZ_MAX_PULSE_WIDTH 125000000LL
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#define KSZ8463_MAX_PULSE_WIDTH 500000LL
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#define KSZ_PTP_INC_NS 40ULL /* HW clock is incremented every 40 ns (by 40) */
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#define KSZ_PTP_SUBNS_BITS 32
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@ -63,6 +64,17 @@ static int ksz_ptp_tou_gpio(struct ksz_device *dev)
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LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2);
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}
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static int ksz8463_ptp_tou_reset(struct ksz_device *dev, u8 unit)
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{
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int ret;
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ret = ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), BIT(unit));
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if (ret)
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return ret;
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return ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), 0);
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}
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static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit)
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{
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u32 data;
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@ -120,6 +132,28 @@ static int ksz_ptp_tou_target_time_set(struct ksz_device *dev,
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return 0;
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}
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static int ksz8463_ptp_tou_start(struct ksz_device *dev, u8 unit)
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{
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u16 data;
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int ret;
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ret = ksz_rmw16(dev, KSZ8463_TOU_EN, BIT(unit), BIT(unit));
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if (ret)
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return ret;
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ret = ksz_read16(dev, KSZ8463_TOU_ACTIVE, &data);
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if (ret)
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return ret;
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if (!(data & BIT(unit))) {
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dev_err(dev->dev, "%s: Trigger unit%d error!\n", __func__,
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unit);
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return -EIO;
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}
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return 0;
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}
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static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit)
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{
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u32 data;
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@ -147,6 +181,56 @@ static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit)
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return 0;
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}
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static int ksz8463_ptp_configure_perout(struct ksz_device *dev,
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struct ptp_perout_request const *request,
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u32 cycle_width_ns, u32 pulse_width_ns,
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u8 index)
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{
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struct ptp_pin_desc *pin = &dev->ptp_data.pin_config[index];
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u16 cfg_base = KSZ8463_TRIG1_CFG + KSZ8463_TRIGN_CFG_SIZE * pin->chan;
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u16 data;
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int ret;
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/* Hardware has only 32 bit for the second field */
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if ((request->start.sec & 0xffffffff) != request->start.sec)
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return -EINVAL;
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data = KSZ8463_NOTIFY_BIT |
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FIELD_PREP(KSZ8463_PATTERN_M, TRIG_POS_PERIOD) |
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pin->index;
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ret = ksz_write16(dev, cfg_base + KSZ8463_PATTERN_OFF, data);
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if (ret)
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return ret;
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ret = ksz_write32(dev, cfg_base + KSZ8463_CYCLE_WIDTH_OFF,
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cycle_width_ns);
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if (ret)
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return ret;
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/* Set cycle count 0 - Infinite */
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ret = ksz_write16(dev, cfg_base + KSZ8463_CYCLE_CNT_OFF, 0);
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if (ret)
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return ret;
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/* KSZ8463 uses a 8 ns unit value to compute the pulse width */
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data = (pulse_width_ns / 8);
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ret = ksz_write16(dev, cfg_base + KSZ8463_PULSE_WIDTH_OFF, data);
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if (ret)
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return ret;
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ret = ksz_write32(dev, cfg_base + KSZ8463_TARGET_NSEC,
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request->start.nsec);
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if (ret)
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return ret;
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ret = ksz_write32(dev, cfg_base + KSZ8463_TARGET_SEC,
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request->start.sec);
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if (ret)
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return ret;
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return 0;
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}
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static int ksz_ptp_configure_perout(struct ksz_device *dev,
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u32 cycle_width_ns, u32 pulse_width_ns,
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struct timespec64 const *target_time,
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@ -242,6 +326,61 @@ static int ksz_ptp_compute_perout_cycle(struct ksz_device *dev,
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return 0;
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}
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static int ksz8463_ptp_enable_perout(struct ksz_device *dev,
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struct ptp_perout_request const *request,
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int on)
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{
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struct ksz_ptp_data *ptp_data = &dev->ptp_data;
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u64 cycle_width_ns;
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u64 pulse_width_ns;
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int pin;
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int ret;
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pin = ksz_ptp_get_pin(dev, request);
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if (pin < 0)
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return pin;
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ret = ksz8463_ptp_tou_reset(dev, request->index);
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if (ret)
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return ret;
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if (!on) {
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ptp_data->tou_mode = KSZ_PTP_TOU_IDLE;
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return 0;
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}
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ret = ksz_ptp_compute_perout_cycle(dev, request,
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KSZ8463_MAX_PULSE_WIDTH,
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&cycle_width_ns, &pulse_width_ns);
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if (ret)
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return ret;
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ret = ksz_ptp_tou_pulse_verify(pulse_width_ns,
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KSZ8463_TRIG_PULSE_WIDTH_M);
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if (ret)
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return ret;
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ret = ksz8463_ptp_configure_perout(dev, request,
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cycle_width_ns, pulse_width_ns,
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pin);
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if (ret)
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return ret;
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ret = ksz_ptp_tou_gpio(dev);
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if (ret)
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return ret;
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ret = ksz8463_ptp_tou_start(dev, request->index);
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if (ret)
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return ret;
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memcpy(&ptp_data->perout_request, request,
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sizeof(struct ptp_perout_request));
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ptp_data->tou_mode = KSZ_PTP_TOU_PEROUT;
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return 0;
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}
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static int ksz_ptp_enable_perout(struct ksz_device *dev,
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struct ptp_perout_request const *request,
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int on)
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@ -853,6 +992,18 @@ static int ksz_ptp_restart_perout(struct ksz_device *dev)
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return ksz_ptp_enable_perout(dev, &request, 1);
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}
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static int ksz8463_ptp_restart_perout(struct ksz_device *dev)
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{
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struct ptp_perout_request request;
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int ret;
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ret = ksz_ptp_prepare_restart_perout(dev, &request);
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if (ret)
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return ret;
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return ksz8463_ptp_enable_perout(dev, &request, 1);
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}
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static int __ksz_ptp_settime(struct ksz_device *dev,
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const struct timespec64 *ts)
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{
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@ -879,6 +1030,41 @@ static int __ksz_ptp_settime(struct ksz_device *dev,
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return 0;
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}
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static int ksz8463_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
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struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
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int ret;
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mutex_lock(&ptp_data->lock);
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ret = __ksz_ptp_settime(dev, ts);
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if (ret)
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goto unlock;
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switch (ptp_data->tou_mode) {
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case KSZ_PTP_TOU_IDLE:
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break;
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case KSZ_PTP_TOU_PEROUT:
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ret = ksz8463_ptp_restart_perout(dev);
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if (ret)
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goto unlock;
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break;
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}
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spin_lock_bh(&ptp_data->clock_lock);
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ptp_data->clock_time = *ts;
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spin_unlock_bh(&ptp_data->clock_lock);
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unlock:
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mutex_unlock(&ptp_data->lock);
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return ret;
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}
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static int ksz_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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@ -993,6 +1179,40 @@ static int __ksz_ptp_adjtime(struct ksz_device *dev, s64 delta)
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return 0;
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}
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static int ksz8463_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
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struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
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struct timespec64 delta64 = ns_to_timespec64(delta);
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int ret;
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mutex_lock(&ptp_data->lock);
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ret = __ksz_ptp_adjtime(dev, delta);
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if (ret)
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goto unlock;
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switch (ptp_data->tou_mode) {
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case KSZ_PTP_TOU_IDLE:
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break;
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case KSZ_PTP_TOU_PEROUT:
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ret = ksz8463_ptp_restart_perout(dev);
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if (ret)
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goto unlock;
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break;
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}
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spin_lock_bh(&ptp_data->clock_lock);
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ptp_data->clock_time = timespec64_add(ptp_data->clock_time, delta64);
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spin_unlock_bh(&ptp_data->clock_lock);
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unlock:
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mutex_unlock(&ptp_data->lock);
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return ret;
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}
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static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
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@ -1027,6 +1247,26 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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return ret;
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}
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static int ksz8463_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *req, int on)
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{
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struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
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struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
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int ret;
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switch (req->type) {
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case PTP_CLK_REQ_PEROUT:
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mutex_lock(&ptp_data->lock);
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ret = ksz8463_ptp_enable_perout(dev, &req->perout, on);
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mutex_unlock(&ptp_data->lock);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return ret;
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}
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static int ksz_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *req, int on)
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{
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@ -1103,6 +1343,27 @@ static int ksz_ptp_start_clock(struct ksz_device *dev)
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return 0;
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}
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void ksz8463_ptp_set_caps(struct dsa_switch *ds)
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{
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struct ksz_device *dev = ds->priv;
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struct ksz_ptp_data *ptp_data;
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ptp_data = &dev->ptp_data;
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ptp_data->caps.owner = THIS_MODULE;
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snprintf(ptp_data->caps.name, 16, "Microchip Clock");
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ptp_data->caps.max_adj = KSZ_MAX_DRIFT_CORR;
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ptp_data->caps.gettime64 = ksz_ptp_gettime;
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ptp_data->caps.settime64 = ksz8463_ptp_settime;
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ptp_data->caps.adjfine = ksz_ptp_adjfine;
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ptp_data->caps.adjtime = ksz8463_ptp_adjtime;
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ptp_data->caps.do_aux_work = ksz_ptp_do_aux_work;
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ptp_data->caps.enable = ksz8463_ptp_enable;
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ptp_data->caps.verify = ksz_ptp_verify_pin;
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ptp_data->caps.n_pins = dev->info->n_pins;
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ptp_data->caps.n_per_out = dev->info->n_per_out;
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}
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void ksz_ptp_set_caps(struct dsa_switch *ds)
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{
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struct ksz_device *dev = ds->priv;
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@ -12,7 +12,7 @@
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#include <linux/ptp_clock_kernel.h>
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#define KSZ_PTP_N_GPIO 2
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#define KSZ_PTP_N_GPIO 12
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enum ksz_ptp_tou_mode {
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KSZ_PTP_TOU_IDLE,
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@ -33,6 +33,7 @@ struct ksz_ptp_data {
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};
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void ksz_ptp_set_caps(struct dsa_switch *ds);
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void ksz8463_ptp_set_caps(struct dsa_switch *ds);
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int ksz_ptp_clock_register(struct dsa_switch *ds);
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void ksz_ptp_clock_unregister(struct dsa_switch *ds);
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@ -66,6 +67,7 @@ struct ksz_ptp_data {
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};
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static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { }
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static inline void ksz8463_ptp_set_caps(struct dsa_switch *ds) { }
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static inline int ksz_ptp_clock_register(struct dsa_switch *ds)
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{
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return 0;
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@ -51,6 +51,22 @@
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#define REG_PTP_UNIT_INDEX__4 0x0520
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#define KSZ8463_TOU_ACTIVE 0x202
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#define KSZ8463_TOU_EN 0x206
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#define KSZ8463_TOU_SW_RST 0x208
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#define KSZ8463_TRIGN_CFG_SIZE 0x20
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#define KSZ8463_TRIG1_CFG 0x220
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#define KSZ8463_TARGET_NSEC 0x000
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#define KSZ8463_TARGET_SEC 0x004
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#define KSZ8463_PATTERN_OFF 0x008
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#define KSZ8463_NOTIFY_BIT BIT(8)
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#define KSZ8463_PATTERN_M GENMASK(6, 4)
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#define KSZ8463_PULSE_WIDTH_OFF 0x00A
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#define KSZ8463_TRIG_PULSE_WIDTH_M GENMASK(15, 0)
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#define KSZ8463_CYCLE_WIDTH_OFF 0x00C
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#define KSZ8463_CYCLE_CNT_OFF 0x010
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#define PTP_GPIO_INDEX GENMASK(19, 16)
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#define PTP_TSI_INDEX BIT(8)
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#define PTP_TOU_INDEX GENMASK(1, 0)
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