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irqchip/gic-v5: Fix standalone IRSes OF probe

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An IRS is architecturally allowed to be standalone, namely, with no
direct CPUs connections. Make sure such configuration is allowed on
OF firmware by skipping "cpus" and "arm,iaffids" IRS node properties
parsing if they are not present so that the IRS configuration can
complete successfully.

Fixes: 5cb1b6dab2 ("irqchip/gic-v5: Add GICv5 IRS/SPI support")
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://patch.msgid.link/20261015-gicv5-irs-no-cpus-v1-2-d4b337b7f000@kernel.org
This commit is contained in:
Lorenzo Pieralisi 2026-10-15 10:20:26 +02:00 committed by Thomas Gleixner
parent 1d77e79d62
commit 64212d6319
1 changed files with 4 additions and 0 deletions
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4
drivers/irqchip/irq-gic-v5-irs.c
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@ -609,6 +609,10 @@ static int __init gicv5_irs_of_init_affinity(struct device_node *node,
u16 iaffid_mask = GENMASK(iaffid_bits - 1, 0);
int ret, i, ncpus, niaffids;
/* An IRS is architecturally allowed to have no cpus associated with it */
if (!of_property_present(node, "cpus") && !of_property_present(node, "arm,iaffids"))
return 0;
ncpus = of_count_phandle_with_args(node, "cpus", NULL);
if (ncpus < 0)
return -EINVAL;