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drm/amd/display: Emit VTEM for HF-VSDB VRR on TMDS links

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HDMI-Forum VRR metadata is carried in the Video Timing Extended Metadata
Packet (VTEM). amdgpu_dm_update_freesync_state_on_stream() only built the
VTEM for SIGNAL_TYPE_HDMI_FRL, so on a TMDS link a sink that advertises
HDMI-Forum VRR via the HF-VSDB (but not AMD FreeSync via the AMD-VSDB)
never received a VTEM and VRR could not engage.

Per HDMI 2.1 a VTEM is a video-blanking data-island packet valid in both
TMDS and FRL modes; only the compressed-video CVTEM is tied to FRL. Build
the VTEM on a TMDS link as well when the sink reports HF-VSDB VRR. Sinks
without HF-VSDB VRR keep the existing AMD FreeSync SPD infopacket path, so
AMD FreeSync behavior is unchanged.

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Pei-Hsin Yang <peihsiny@valvesoftware.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Fangzhi Zuo 2026-08-20 10:50:19 -04:00 committed by Alex Deucher
parent f2a961457c
commit 640fd039dc
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c
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@ -238,7 +238,10 @@ void amdgpu_dm_update_freesync_state_on_stream(
&vrr_infopacket,
pack_sdp_v1_3);
if (new_stream->sink->sink_signal == SIGNAL_TYPE_HDMI_FRL)
/* Per HDMI 2.1, VTEM is valid on TMDS as well as FRL */
if (new_stream->sink->sink_signal == SIGNAL_TYPE_HDMI_FRL ||
(new_stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A &&
aconn && aconn->base.display_info.hdmi.vrr_cap.supported))
mod_build_infopacket_vtem(new_stream, &vrr_params, 0, &vrr_infopacket);
new_crtc_state->freesync_vrr_info_changed |=