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drm/amd/display: Atomize IRQ register read/modify/write ops
[Why]
The OTG_GLOBAL_SYNC_STATUS register controls various HW IRQ sources for
the output timing generator (OTG). VUPDATE_NO_LOCK is one of them.
To enable the IRQ, driver sets the VUPDATE_NO_LOCK_EN bit in the
GLOBAL_SYNC_STATUS register.
To ack the IRQ after it fires, the driver sets the VUPDATE_NO_LOCK_CLEAR
bit in the same GLOBAL_SYNC_STATUS register.
The bit sets are done through read/modify/write operations, which are
not atomic. Thus, the following race is possible:
Thread A: IRQ handler:
*HW IRQ fires*
# IRQ disable
val = read(GLOBAL_SYNC_STATUS)
unset(val, VUPDATE_NO_LOCK_EN)
write(val, GLOBAL_SYNC_STATUS)
# ACK reads VUPDATE_NO_LOCK_EN unset
val1 = read(GLOBAL_SYNC_STATUS)
set(val1, VUPDATE_NO_LOCK_CLEAR)
# IRQ enable
val = read(GLOBAL_SYNC_STATUS)
set(val, VUPDATE_NO_LOCK_EN)
write(val, GLOBAL_SYNC_STATUS)
# BAD! clears VUPDATE_NO_LOCK_EN
write(val1, GLOBAL_SYNC_STATUS)
Regarding the tagged Fixes: change, it appears the change made this race
more likely to occur. Since VUPDATE_NO_LOCK is now the sole IRQ source
for vblank handling, a single race on high refresh panels can lead to a
time out.
[How]
The GLOBAL_SYNC_STATUS register is only one example, other IRQ control
registers also share the same scheme. On top of GLOBAL_SYNC_STATUS,
let's clean up those as well.
To keep things simple, Let's atomize the IRQ rmw ops via a single
driver-wide spinlock. Due to the small scope of this lock, it is
unlikely to cause noticeable overhead on top of all the existing locking
within the IRQ set/handle paths.
Since DM is responsible for locking, wrap dc_interrupt_set/ack with the
spinlock in the new amdgpu_dm_irq_set/ack functions. Migrate/drop all
references in DM to dc_interrupt_set/ack to use amdgpu_dm_irq_set/ack
instead.
Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5616
Fixes: c87e6635d2 ("drm/amd/display: consolidate DCN vblank/flip handling onto vupdate_no_lock")
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 70de0a0216583a53c946155f8c8adedfdca6b4e7)
Cc: stable@vger.kernel.org
This commit is contained in:
Leo Li
Alex Deucher
parent
9413959fa9
commit
63e19ef3dd
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@ -1420,7 +1420,7 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,
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if (acrtc && state->stream_status[i].plane_count != 0 &&
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amdgpu_ip_version(adev, DCE_HWIP, 0) == 0) {
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irq_source = IRQ_TYPE_PFLIP + acrtc->otg_inst;
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rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY;
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rc = amdgpu_dm_irq_set(adev, irq_source, enable) ? 0 : -EBUSY;
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if (rc)
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drm_warn(adev_to_drm(adev), "Failed to %s pflip interrupts\n",
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enable ? "enable" : "disable");
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@ -1444,7 +1444,7 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,
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/* During gpu-reset we disable and then enable vblank irq, so
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* don't use amdgpu_irq_get/put() to avoid refcount change.
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*/
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if (!dc_interrupt_set(adev->dm.dc, irq_source, enable))
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if (!amdgpu_dm_irq_set(adev, irq_source, enable))
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drm_warn(adev_to_drm(adev), "Failed to %sable vblank interrupt\n", enable ? "en" : "dis");
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} else if (acrtc && state->stream_status[i].plane_count != 0) {
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@ -552,6 +552,18 @@ struct amdgpu_display_manager {
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struct common_irq_params
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vupdate_params[DC_IRQ_SOURCE_VUPDATE6 - DC_IRQ_SOURCE_VUPDATE1 + 1];
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/**
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* @irq_reg_lock:
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*
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* Serializes the read-modify-writes of the HW interrupt control
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* registers. Several interrupt sources share one register - e.g. the
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* enable and clear bits of both VSTARTUP (vblank) and VUPDATE_NO_LOCK
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* live in OTG_GLOBAL_SYNC_STATUS. Therefore, enabling one source must
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* not race with acking another. Held only across amdgpu_dm_irq_set()
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* and amdgpu_dm_irq_ack().
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*/
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spinlock_t irq_reg_lock;
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/**
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* @dmub_trace_params:
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*
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@ -31,6 +31,7 @@
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#include "amdgpu_dm_psr.h"
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#include "amdgpu_dm_replay.h"
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#include "amdgpu_dm_crtc.h"
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#include "amdgpu_dm_irq.h"
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#include "amdgpu_dm_plane.h"
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#include "amdgpu_dm_trace.h"
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#include "amdgpu_dm_debugfs.h"
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@ -91,7 +92,7 @@ int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
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irq_source = IRQ_TYPE_VUPDATE + acrtc->otg_inst;
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rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY;
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rc = amdgpu_dm_irq_set(adev, irq_source, enable) ? 0 : -EBUSY;
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DRM_DEBUG_VBL("crtc %d - vupdate irq %sabling: r=%d\n",
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acrtc->crtc_id, enable ? "en" : "dis", rc);
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@ -1439,12 +1439,13 @@ void dm_helpers_free_gpu_mem(
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bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable)
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{
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struct amdgpu_device *adev = ctx->driver_context;
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enum dc_irq_source irq_source;
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bool ret;
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irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX;
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ret = dc_interrupt_set(ctx->dc, irq_source, enable);
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ret = amdgpu_dm_irq_set(adev, irq_source, enable);
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DRM_DEBUG_DRIVER("Dmub trace irq %sabling: r=%d\n",
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enable ? "en" : "dis", ret);
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@ -396,6 +396,7 @@ int amdgpu_dm_irq_init(struct amdgpu_device *adev)
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DRM_DEBUG_KMS("DM_IRQ\n");
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spin_lock_init(&adev->dm.irq_handler_list_table_lock);
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spin_lock_init(&adev->dm.irq_reg_lock);
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adev->dm.irq_wq = alloc_workqueue("amdgpu_dm_irq",
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WQ_UNBOUND | WQ_HIGHPRI, 0);
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@ -530,7 +531,7 @@ void amdgpu_dm_irq_suspend(struct amdgpu_device *adev)
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*/
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for (src = DC_IRQ_SOURCE_HPD1; src <= DC_IRQ_SOURCE_HPD6RX; src++) {
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hnd_list_l = &adev->dm.irq_handler_list_low_tab[src];
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dc_interrupt_set(adev->dm.dc, src, false);
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amdgpu_dm_irq_set(adev, src, false);
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DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
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@ -568,7 +569,7 @@ void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev)
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hnd_list_l = &adev->dm.irq_handler_list_low_tab[src];
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hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
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if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))
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dc_interrupt_set(adev->dm.dc, src, true);
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amdgpu_dm_irq_set(adev, src, true);
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}
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DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
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@ -594,7 +595,7 @@ void amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
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hnd_list_l = &adev->dm.irq_handler_list_low_tab[src];
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hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
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if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))
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dc_interrupt_set(adev->dm.dc, src, true);
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amdgpu_dm_irq_set(adev, src, true);
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}
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DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
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@ -690,6 +691,23 @@ STATIC_IFN_KUNIT void amdgpu_dm_irq_immediate_work(struct amdgpu_device *adev,
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}
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EXPORT_IF_KUNIT(amdgpu_dm_irq_immediate_work);
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bool amdgpu_dm_irq_set(struct amdgpu_device *adev, enum dc_irq_source src,
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bool enable)
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{
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guard(spinlock_irqsave)(&adev->dm.irq_reg_lock);
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return dc_interrupt_set(adev->dm.dc, src, enable);
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}
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EXPORT_IF_KUNIT(amdgpu_dm_irq_set);
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void amdgpu_dm_irq_ack(struct amdgpu_device *adev, enum dc_irq_source src)
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{
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guard(spinlock_irqsave)(&adev->dm.irq_reg_lock);
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dc_interrupt_ack(adev->dm.dc, src);
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}
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EXPORT_IF_KUNIT(amdgpu_dm_irq_ack);
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/**
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* amdgpu_dm_irq_handler - Generic DM IRQ handler
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* @adev: amdgpu base driver device containing the DM device
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@ -710,7 +728,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_irq_handler(struct amdgpu_device *adev,
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entry->src_id,
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entry->src_data[0]);
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dc_interrupt_ack(adev->dm.dc, src);
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amdgpu_dm_irq_ack(adev, src);
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/* Call high irq work immediately */
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amdgpu_dm_irq_immediate_work(adev, src);
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@ -750,7 +768,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *adev,
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enum dc_irq_source src = amdgpu_dm_hpd_to_dal_irq_source(type);
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bool st = (state == AMDGPU_IRQ_STATE_ENABLE);
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dc_interrupt_set(adev->dm.dc, src, st);
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amdgpu_dm_irq_set(adev, src, st);
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return 0;
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}
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EXPORT_IF_KUNIT(amdgpu_dm_set_hpd_irq_state);
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@ -785,7 +803,7 @@ static inline int dm_irq_state(struct amdgpu_device *adev,
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if (dc && dc->caps.ips_support && dc->idle_optimizations_allowed)
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dc_allow_idle_optimizations(dc, false);
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dc_interrupt_set(adev->dm.dc, irq_source, st);
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amdgpu_dm_irq_set(adev, irq_source, st);
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return 0;
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}
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@ -842,7 +860,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_dmub_outbox_irq_state(struct amdgpu_device *a
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enum dc_irq_source irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX;
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bool st = (state == AMDGPU_IRQ_STATE_ENABLE);
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dc_interrupt_set(adev->dm.dc, irq_source, st);
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amdgpu_dm_irq_set(adev, irq_source, st);
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return 0;
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}
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EXPORT_IF_KUNIT(amdgpu_dm_set_dmub_outbox_irq_state);
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@ -870,7 +888,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_set_dmub_trace_irq_state(struct amdgpu_device *ad
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enum dc_irq_source irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX0;
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bool st = (state == AMDGPU_IRQ_STATE_ENABLE);
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dc_interrupt_set(adev->dm.dc, irq_source, st);
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amdgpu_dm_irq_set(adev, irq_source, st);
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return 0;
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}
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EXPORT_IF_KUNIT(amdgpu_dm_set_dmub_trace_irq_state);
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@ -937,9 +955,7 @@ EXPORT_IF_KUNIT(amdgpu_dm_set_irq_funcs);
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void amdgpu_dm_outbox_init(struct amdgpu_device *adev)
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{
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dc_interrupt_set(adev->dm.dc,
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DC_IRQ_SOURCE_DMCUB_OUTBOX,
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true);
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amdgpu_dm_irq_set(adev, DC_IRQ_SOURCE_DMCUB_OUTBOX, true);
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}
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EXPORT_IF_KUNIT(amdgpu_dm_outbox_init);
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@ -962,7 +978,7 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
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/* First, clear all hpd and hpdrx interrupts */
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for (i = DC_IRQ_SOURCE_HPD1; i <= DC_IRQ_SOURCE_HPD6RX; i++) {
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if (!dc_interrupt_set(adev->dm.dc, i, false))
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if (!amdgpu_dm_irq_set(adev, i, false))
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drm_err(dev, "Failed to clear hpd(rx) source=%d on init\n",
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i);
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}
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@ -991,7 +1007,7 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
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* of dm. Note that only hpd interrupt types are registered with
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* base driver; hpd_rx types aren't. IOW, amdgpu_irq_get/put on
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* hpd_rx isn't available. DM currently controls hpd_rx
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* explicitly with dc_interrupt_set()
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* explicitly with amdgpu_dm_irq_set()
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*/
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if (dc_link->irq_source_hpd != DC_IRQ_SOURCE_INVALID) {
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irq_type = dc_link->irq_source_hpd - DC_IRQ_SOURCE_HPD1;
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@ -1000,23 +1016,21 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
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* and what bios reports as the # of connectors with hpd
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* sources. Since the # of hpd source types registered
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* with base driver == mode_info.num_hpd, we have to
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* fallback to dc_interrupt_set for the remaining types.
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* fallback to amdgpu_dm_irq_set for the remaining types.
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*/
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if (irq_type < adev->mode_info.num_hpd) {
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if (amdgpu_irq_get(adev, &adev->hpd_irq, irq_type))
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drm_err(dev, "DM_IRQ: Failed get HPD for source=%d)!\n",
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dc_link->irq_source_hpd);
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} else {
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dc_interrupt_set(adev->dm.dc,
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dc_link->irq_source_hpd,
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true);
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amdgpu_dm_irq_set(adev, dc_link->irq_source_hpd,
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true);
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}
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}
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if (dc_link->irq_source_hpd_rx != DC_IRQ_SOURCE_INVALID) {
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dc_interrupt_set(adev->dm.dc,
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dc_link->irq_source_hpd_rx,
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true);
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amdgpu_dm_irq_set(adev, dc_link->irq_source_hpd_rx,
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true);
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}
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}
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drm_connector_list_iter_end(&iter);
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@ -1061,16 +1075,14 @@ void amdgpu_dm_hpd_fini(struct amdgpu_device *adev)
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drm_err(dev, "DM_IRQ: Failed put HPD for source=%d!\n",
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dc_link->irq_source_hpd);
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} else {
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dc_interrupt_set(adev->dm.dc,
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dc_link->irq_source_hpd,
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false);
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amdgpu_dm_irq_set(adev, dc_link->irq_source_hpd,
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false);
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}
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}
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if (dc_link->irq_source_hpd_rx != DC_IRQ_SOURCE_INVALID) {
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dc_interrupt_set(adev->dm.dc,
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dc_link->irq_source_hpd_rx,
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false);
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amdgpu_dm_irq_set(adev, dc_link->irq_source_hpd_rx,
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false);
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}
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}
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drm_connector_list_iter_end(&iter);
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@ -89,6 +89,34 @@ void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
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enum dc_irq_source irq_source,
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void *ih_index);
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/**
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* amdgpu_dm_irq_set - enable or disable a DC interrupt source.
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*
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* @adev: AMD DRM device
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* @src: DC interrupt source to toggle
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* @enable: true to enable the source, false to disable it
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*
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* DM-wide replacement for dc_interrupt_set(). As locking is DM's
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* responsibility, this is a thin wrapper serializes the underlying
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* read-modify-write against the other interrupt sources sharing HW control
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* registers with @src, so DM must never call dc_interrupt_set() directly.
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*
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* Returns: true if the source was toggled.
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*/
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bool amdgpu_dm_irq_set(struct amdgpu_device *adev, enum dc_irq_source src,
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bool enable);
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/**
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* amdgpu_dm_irq_ack - acknowledge a DC interrupt source.
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*
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* @adev: AMD DRM device
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* @src: DC interrupt source to acknowledge
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*
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* DM-wide replacement for dc_interrupt_ack(), serialized the same way as
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* amdgpu_dm_irq_set().
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*/
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void amdgpu_dm_irq_ack(struct amdgpu_device *adev, enum dc_irq_source src);
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void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
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void amdgpu_dm_outbox_init(struct amdgpu_device *adev);
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@ -436,7 +436,7 @@ static void dm_test_crtc_set_vupdate_irq_no_otg(struct kunit *test)
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* dm_test_crtc_set_vupdate_irq_dc_busy - Test vupdate irq when DC rejects request
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* @test: The KUnit test context
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*
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* With an OTG instance assigned but no DC attached, dc_interrupt_set() returns
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* With an OTG instance assigned but no DC attached, amdgpu_dm_irq_set() returns
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* false and the function must report the request as busy (-EBUSY).
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*/
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static void dm_test_crtc_set_vupdate_irq_dc_busy(struct kunit *test)
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@ -453,12 +453,12 @@ static void dm_test_crtc_set_vupdate_irq_dc_busy(struct kunit *test)
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acrtc->base.dev = &adev->ddev;
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acrtc->otg_inst = 0;
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/* adev->dm.dc is NULL, so dc_interrupt_set() returns false. */
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/* adev->dm.dc is NULL, so amdgpu_dm_irq_set() returns false. */
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KUNIT_EXPECT_EQ(test,
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amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, true), -EBUSY);
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}
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/* Per-source funcs let dc_interrupt_set() succeed without register access. */
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/* Per-source funcs let amdgpu_dm_irq_set() succeed without register access. */
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static bool dm_test_vupdate_irq_src_set(struct irq_service *irq_service,
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const struct irq_source_info *info,
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bool enable)
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@ -477,7 +477,7 @@ static struct irq_source_info_funcs dm_test_vupdate_irq_src_funcs = {
|
|||
.ack = dm_test_vupdate_irq_src_ack,
|
||||
};
|
||||
|
||||
/* A .set that fails so dc_interrupt_set() reports the source as busy. */
|
||||
/* A .set that fails so amdgpu_dm_irq_set() reports the source as busy. */
|
||||
static bool dm_test_vupdate_irq_src_set_busy(struct irq_service *irq_service,
|
||||
const struct irq_source_info *info,
|
||||
bool enable)
|
||||
|
|
@ -519,7 +519,9 @@ static void dm_test_crtc_set_vupdate_irq_enable(struct kunit *test)
|
|||
irqs = kunit_kzalloc(test, sizeof(*irqs), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
|
||||
|
||||
/* Populate the per-source info table so dc_interrupt_set() succeeds. */
|
||||
/*
|
||||
* Populate the per-source info table so amdgpu_dm_irq_set() succeeds.
|
||||
*/
|
||||
info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
|
||||
GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, info);
|
||||
|
|
@ -1018,7 +1020,9 @@ static void dm_test_crtc_enable_vblank_vupdate_busy(struct kunit *test)
|
|||
irqs = kunit_kzalloc(test, sizeof(*irqs), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
|
||||
|
||||
/* Per-source .set fails so dc_interrupt_set() reports the source busy. */
|
||||
/*
|
||||
* Per-source .set fails so amdgpu_dm_irq_set() reports the source busy.
|
||||
*/
|
||||
info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
|
||||
GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, info);
|
||||
|
|
|
|||
|
|
@ -2442,17 +2442,21 @@ static void dm_test_is_dp_sink_present_null_priv(struct kunit *test)
|
|||
* dm_test_dmub_outbox_interrupt_control_null_dc - Test outbox irq control with NULL dc
|
||||
* @test: The KUnit test context
|
||||
*
|
||||
* dc_interrupt_set() is NULL-safe and returns false when dc is NULL, so the
|
||||
* amdgpu_dm_irq_set() is NULL-safe and returns false when dc is NULL, so the
|
||||
* helper returns false without touching real interrupt hardware.
|
||||
*/
|
||||
static void dm_test_dmub_outbox_interrupt_control_null_dc(struct kunit *test)
|
||||
{
|
||||
struct amdgpu_device *adev;
|
||||
struct dc_context *ctx;
|
||||
|
||||
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_NULL(test, adev);
|
||||
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_NULL(test, ctx);
|
||||
ctx->driver_context = adev;
|
||||
|
||||
/* ctx->dc is NULL → dc_interrupt_set returns false */
|
||||
/* adev->dm.dc is NULL → amdgpu_dm_irq_set returns false */
|
||||
KUNIT_EXPECT_FALSE(test, dm_helpers_dmub_outbox_interrupt_control(ctx, true));
|
||||
KUNIT_EXPECT_FALSE(test, dm_helpers_dmub_outbox_interrupt_control(ctx, false));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -268,7 +268,7 @@ static bool dm_test_irq_src_ack(struct irq_service *irq_service,
|
|||
return true;
|
||||
}
|
||||
|
||||
/* Per-source funcs let dc_interrupt_set() succeed without register access. */
|
||||
/* Per-source funcs let amdgpu_dm_irq_set() succeed without register access. */
|
||||
static struct irq_source_info_funcs dm_test_irq_src_funcs = {
|
||||
.set = dm_test_irq_src_set,
|
||||
.ack = dm_test_irq_src_ack,
|
||||
|
|
@ -290,7 +290,7 @@ static struct dc *dm_test_alloc_dc_with_irq_service(struct kunit *test,
|
|||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
|
||||
|
||||
/*
|
||||
* Populate the per-source info table so dc_interrupt_set()/_ack()
|
||||
* Populate the per-source info table so amdgpu_dm_irq_set()/_ack()
|
||||
* succeed without touching hardware registers.
|
||||
*/
|
||||
info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
|
||||
|
|
@ -1227,7 +1227,7 @@ static void dm_test_irq_suspend_empty(struct kunit *test)
|
|||
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
|
||||
|
||||
/*
|
||||
* With no registered handlers the HW dc_interrupt_set() calls are
|
||||
* With no registered handlers the amdgpu_dm_irq_set() calls are
|
||||
* skipped, so suspend must complete without touching the (absent) DC.
|
||||
*/
|
||||
amdgpu_dm_irq_suspend(adev);
|
||||
|
|
@ -1275,11 +1275,11 @@ static void dm_test_irq_resume_late_empty(struct kunit *test)
|
|||
}
|
||||
|
||||
/**
|
||||
* dm_test_irq_suspend_registered - Test suspend reaches the dc_interrupt_set path
|
||||
* dm_test_irq_suspend_registered - Test suspend reaches the irq set path
|
||||
* @test: The KUnit test context
|
||||
*
|
||||
* Registers a low-context HPD handler so the handler list is non-empty,
|
||||
* forcing amdgpu_dm_irq_suspend() to call dc_interrupt_set() (NULL-safe with
|
||||
* forcing amdgpu_dm_irq_suspend() to call amdgpu_dm_irq_set() (NULL-safe with
|
||||
* no DC) and flush_work() on the registered handler.
|
||||
*/
|
||||
static void dm_test_irq_suspend_registered(struct kunit *test)
|
||||
|
|
@ -1330,11 +1330,11 @@ static void dm_test_irq_suspend_disables_polling(struct kunit *test)
|
|||
}
|
||||
|
||||
/**
|
||||
* dm_test_irq_resume_early_registered - Test early resume reaches dc_interrupt_set
|
||||
* dm_test_irq_resume_early_registered - Test early resume reaches irq set
|
||||
* @test: The KUnit test context
|
||||
*
|
||||
* Registers a low-context HPD RX handler so early resume calls
|
||||
* dc_interrupt_set() for the short-pulse interrupt source.
|
||||
* amdgpu_dm_irq_set() for the short-pulse interrupt source.
|
||||
*/
|
||||
static void dm_test_irq_resume_early_registered(struct kunit *test)
|
||||
{
|
||||
|
|
@ -1358,10 +1358,10 @@ static void dm_test_irq_resume_early_registered(struct kunit *test)
|
|||
}
|
||||
|
||||
/**
|
||||
* dm_test_irq_resume_late_registered - Test late resume reaches dc_interrupt_set
|
||||
* dm_test_irq_resume_late_registered - Test late resume reaches irq set
|
||||
* @test: The KUnit test context
|
||||
*
|
||||
* Registers a low-context HPD handler so late resume calls dc_interrupt_set()
|
||||
* Registers a low-context HPD handler so late resume calls amdgpu_dm_irq_set()
|
||||
* for the HPD interrupt source.
|
||||
*/
|
||||
static void dm_test_irq_resume_late_registered(struct kunit *test)
|
||||
|
|
@ -1592,7 +1592,7 @@ static void dm_test_set_crtc_irq_state_enable(struct kunit *test)
|
|||
|
||||
/*
|
||||
* otg_inst >= 0 computes the irq source and reaches the NULL-safe
|
||||
* dc_interrupt_set(); the ips_support branch is skipped (dc == NULL).
|
||||
* amdgpu_dm_irq_set(); the ips_support branch is skipped (dc == NULL).
|
||||
*/
|
||||
acrtc->otg_inst = 3;
|
||||
adev->mode_info.crtcs[0] = acrtc;
|
||||
|
|
@ -1671,8 +1671,8 @@ static void dm_test_set_vupdate_irq_state_enable(struct kunit *test)
|
|||
*
|
||||
* With a non-NULL DC that advertises IPS support and currently allows idle
|
||||
* optimizations, dm_irq_state() must call dc_allow_idle_optimizations() before
|
||||
* dc_interrupt_set(). disable_idle_power_optimizations makes that call a safe
|
||||
* early return, and per-source stub funcs let dc_interrupt_set() succeed.
|
||||
* amdgpu_dm_irq_set(). disable_idle_power_optimizations makes that call a safe
|
||||
* early return, and per-source stub funcs let amdgpu_dm_irq_set() succeed.
|
||||
*/
|
||||
static void dm_test_set_crtc_irq_state_allows_idle(struct kunit *test)
|
||||
{
|
||||
|
|
@ -1891,7 +1891,7 @@ static void dm_test_set_hpd_irq_state_null_dc(struct kunit *test)
|
|||
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
|
||||
|
||||
/* dc_interrupt_set() is a no-op when dc is NULL, so both states
|
||||
/* amdgpu_dm_irq_set() is a no-op when dc is NULL, so both states
|
||||
* return 0 without dereferencing the (absent) DC.
|
||||
*/
|
||||
KUNIT_EXPECT_EQ(test, amdgpu_dm_set_hpd_irq_state(adev, NULL, AMDGPU_HPD_1,
|
||||
|
|
@ -1951,7 +1951,7 @@ static void dm_test_outbox_init_null_dc(struct kunit *test)
|
|||
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
|
||||
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
|
||||
|
||||
/* Single dc_interrupt_set() call must be skipped when dc is NULL. */
|
||||
/* Single amdgpu_dm_irq_set() call must be skipped when dc is NULL. */
|
||||
amdgpu_dm_outbox_init(adev);
|
||||
}
|
||||
|
||||
|
|
@ -1969,7 +1969,7 @@ static void dm_test_hpd_init_empty_connectors(struct kunit *test)
|
|||
|
||||
/*
|
||||
* With an empty connector list the per-connector loop is skipped and
|
||||
* the initial clear loop relies on dc_interrupt_set() being a no-op
|
||||
* the initial clear loop relies on amdgpu_dm_irq_set() being a no-op
|
||||
* for a NULL dc, so init must complete without touching the DC.
|
||||
*/
|
||||
amdgpu_dm_hpd_init(adev);
|
||||
|
|
@ -2004,7 +2004,7 @@ static void dm_test_hpd_init_fini_with_connectors(struct kunit *test)
|
|||
|
||||
/*
|
||||
* num_hpd = 0 forces irq_type >= num_hpd so the loop takes the HW
|
||||
* fallback (dc_interrupt_set()) instead of amdgpu_irq_get(); with a
|
||||
* fallback (amdgpu_dm_irq_set()) instead of amdgpu_irq_get(); with a
|
||||
* NULL dc that fallback is a safe no-op.
|
||||
*/
|
||||
adev->mode_info.num_hpd = 0;
|
||||
|
|
@ -2090,7 +2090,7 @@ static void dm_test_hpd_init_fini_irq_ref(struct kunit *test)
|
|||
/*
|
||||
* num_hpd >= 1 makes irq_type (0) < num_hpd, so the loop takes the
|
||||
* amdgpu_irq_get()/amdgpu_irq_put() branch instead of the
|
||||
* dc_interrupt_set() fallback. The mock device has irq.installed ==
|
||||
* amdgpu_dm_irq_set() fallback. The mock device has irq.installed ==
|
||||
* false, so both calls fail early with -ENOENT (logging an error)
|
||||
* without touching the base-driver irq state.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user