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drm/i915: Use REG_BIT() for bdw+ pipe interrupts

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Replace the hand rolled (1<<n) with the modern REG_BIT()
approach for the bdw+ pipe interrupt bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2024-06-05 14:18:26 +03:00
parent d754ed2821
commit 6399c94f4b
1 changed files with 27 additions and 27 deletions
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54
drivers/gpu/drm/i915/i915_reg.h
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@ -2499,33 +2499,33 @@
#define GEN8_DE_PIPE_IMR(pipe) _MMIO(0x44404 + (0x10 * (pipe)))
#define GEN8_DE_PIPE_IIR(pipe) _MMIO(0x44408 + (0x10 * (pipe)))
#define GEN8_DE_PIPE_IER(pipe) _MMIO(0x4440c + (0x10 * (pipe)))
#define GEN8_PIPE_FIFO_UNDERRUN (1 << 31)
#define GEN8_PIPE_CDCLK_CRC_ERROR (1 << 29)
#define GEN8_PIPE_CDCLK_CRC_DONE (1 << 28)
#define XELPD_PIPE_SOFT_UNDERRUN (1 << 22)
#define XELPD_PIPE_HARD_UNDERRUN (1 << 21)
#define GEN12_PIPE_VBLANK_UNMOD (1 << 19)
#define GEN8_PIPE_CURSOR_FAULT (1 << 10)
#define GEN8_PIPE_SPRITE_FAULT (1 << 9)
#define GEN8_PIPE_PRIMARY_FAULT (1 << 8)
#define GEN8_PIPE_SPRITE_FLIP_DONE (1 << 5)
#define GEN8_PIPE_PRIMARY_FLIP_DONE (1 << 4)
#define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2)
#define GEN8_PIPE_VSYNC (1 << 1)
#define GEN8_PIPE_VBLANK (1 << 0)
#define GEN9_PIPE_CURSOR_FAULT (1 << 11)
#define GEN11_PIPE_PLANE7_FAULT (1 << 22)
#define GEN11_PIPE_PLANE6_FAULT (1 << 21)
#define GEN11_PIPE_PLANE5_FAULT (1 << 20)
#define GEN9_PIPE_PLANE4_FAULT (1 << 10)
#define GEN9_PIPE_PLANE3_FAULT (1 << 9)
#define GEN9_PIPE_PLANE2_FAULT (1 << 8)
#define GEN9_PIPE_PLANE1_FAULT (1 << 7)
#define GEN9_PIPE_PLANE4_FLIP_DONE (1 << 6)
#define GEN9_PIPE_PLANE3_FLIP_DONE (1 << 5)
#define GEN9_PIPE_PLANE2_FLIP_DONE (1 << 4)
#define GEN9_PIPE_PLANE1_FLIP_DONE (1 << 3)
#define GEN9_PIPE_PLANE_FLIP_DONE(p) (1 << (3 + (p)))
#define GEN8_PIPE_FIFO_UNDERRUN REG_BIT(31)
#define GEN8_PIPE_CDCLK_CRC_ERROR REG_BIT(29)
#define GEN8_PIPE_CDCLK_CRC_DONE REG_BIT(28)
#define XELPD_PIPE_SOFT_UNDERRUN REG_BIT(22)
#define XELPD_PIPE_HARD_UNDERRUN REG_BIT(21)
#define GEN12_PIPE_VBLANK_UNMOD REG_BIT(19)
#define GEN8_PIPE_CURSOR_FAULT REG_BIT(10)
#define GEN8_PIPE_SPRITE_FAULT REG_BIT(9)
#define GEN8_PIPE_PRIMARY_FAULT REG_BIT(8)
#define GEN8_PIPE_SPRITE_FLIP_DONE REG_BIT(5)
#define GEN8_PIPE_PRIMARY_FLIP_DONE REG_BIT(4)
#define GEN8_PIPE_SCAN_LINE_EVENT REG_BIT(2)
#define GEN8_PIPE_VSYNC REG_BIT(1)
#define GEN8_PIPE_VBLANK REG_BIT(0)
#define GEN9_PIPE_CURSOR_FAULT REG_BIT(11)
#define GEN11_PIPE_PLANE7_FAULT REG_BIT(22)
#define GEN11_PIPE_PLANE6_FAULT REG_BIT(21)
#define GEN11_PIPE_PLANE5_FAULT REG_BIT(20)
#define GEN9_PIPE_PLANE4_FAULT REG_BIT(10)
#define GEN9_PIPE_PLANE3_FAULT REG_BIT(9)
#define GEN9_PIPE_PLANE2_FAULT REG_BIT(8)
#define GEN9_PIPE_PLANE1_FAULT REG_BIT(7)
#define GEN9_PIPE_PLANE4_FLIP_DONE REG_BIT(6)
#define GEN9_PIPE_PLANE3_FLIP_DONE REG_BIT(5)
#define GEN9_PIPE_PLANE2_FLIP_DONE REG_BIT(4)
#define GEN9_PIPE_PLANE1_FLIP_DONE REG_BIT(3)
#define GEN9_PIPE_PLANE_FLIP_DONE(p) REG_BIT(3 + (p))
#define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \
(GEN8_PIPE_CURSOR_FAULT | \
GEN8_PIPE_SPRITE_FAULT | \