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arm64: dts: apple: Add J180d (Mac Pro, M2 Ultra, 2023) device tree

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The M2 Ultra in the Mac Pro differs from the M2 Ultra Mac Studio in its
PCIe setup. It uses all available 16 PCIe Gen4 on the first die and 8
PCIe Gen4 lanes on the second die to connect to a 100 lane Microchip
Switchtec PCIe switch. All internal PCIe devices and the PCIe slots are
connected to the PCIe switch.
Each die implements a PCIe controller with a single 16 or 8 lane port.
The PCIe controller is mostly compatible with existing implementation
in pcie-apple.c.
The resources for other 8 lanes on the second die are used to connect
the NVMe flash with the controller in the SoC.
This initial device tree does not include PCIe support.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@kernel.org>
Signed-off-by: Sven Peter <sven@kernel.org>
This commit is contained in:
Hector Martin 2025-09-14 21:38:49 +02:00 committed by Sven Peter
parent 9da45d978c
commit 637f7d2c73
2 changed files with 122 additions and 0 deletions
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1
arch/arm64/boot/dts/apple/Makefile
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@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6022-j180d.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6020-j414s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6021-j414c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6020-j416s.dtb

121
arch/arm64/boot/dts/apple/t6022-j180d.dts Normal file
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@ -0,0 +1,121 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Pro (M2 Ultra, 2023)
*
* target-type: J180d
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6022.dtsi"
#include "t6022-jxxxd.dtsi"
/ {
compatible = "apple,j180d", "apple,t6022", "apple,arm-platform";
model = "Apple Mac Pro (M2 Ultra, 2023)";
aliases {
nvram = &nvram;
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
power-domains = <&ps_dispext0_cpu0_die1>, <&ps_dptx_phy_ps_die1>;
};
};
memory@10000000000 {
device_type = "memory";
reg = <0x100 0 0x2 0>; /* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
/* USB Type C Rear */
&i2c0 {
hpm2: usb-pd@3b {
compatible = "apple,cd321x";
reg = <0x3b>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
hpm3: usb-pd@3c {
compatible = "apple,cd321x";
reg = <0x3c>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
/* hpm4 and hpm5 included from t6022-jxxxd.dtsi */
hpm6: usb-pd@3d {
compatible = "apple,cd321x";
reg = <0x3d>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
hpm7: usb-pd@3e {
compatible = "apple,cd321x";
reg = <0x3e>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
};
/* USB Type C Front */
&i2c3 {
status = "okay";
hpm0: usb-pd@38 {
compatible = "apple,cd321x";
reg = <0x38>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
hpm1: usb-pd@3f {
compatible = "apple,cd321x";
reg = <0x3f>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
};
/*
* Delete unused PCIe nodes, the Mac Pro uses slightly different PCIe
* controllers with a single port connected to a PM40100 PCIe switch
*/
/delete-node/ &pcie0;
/delete-node/ &pcie0_dart_0;
/delete-node/ &pcie0_dart_1;
/delete-node/ &pcie0_dart_2;
/delete-node/ &pcie0_dart_3;
&nco_clkref {
clock-frequency = <1068000000>;
};
#include "spi1-nvram.dtsi"