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drm/amdgpu/gfx6: Execute CLEAR_STATE when initializing compute rings

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Emit a compute CLEAR_STATE packet on the compute rings after
the GFX ring already finished executing ME_INITIALIZE and
before the ring test, so that gfx_v6_0_cp_gfx_resume() can
wait until the CLEAR_STATE is complete.

For reference, see si_cp_start() in the old radeon driver.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Timur Kristóf 2026-08-03 15:23:05 +02:00 committed by Alex Deucher
parent 5e996008db
commit 62ca273df3
1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
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@ -2258,6 +2258,14 @@ static int gfx_v6_0_cp_gfx_resume(struct amdgpu_device *adev)
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
ring = &adev->gfx.compute_ring[i];
r = amdgpu_ring_alloc(ring, 2);
if (r)
return r;
amdgpu_ring_write(ring, PACKET3_COMPUTE(PACKET3_CLEAR_STATE, 0));
amdgpu_ring_write(ring, 0);
amdgpu_ring_commit(ring);
r = amdgpu_ring_test_helper(ring);
if (r)
return r;