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dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID

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Add the Peripheral Module Clock L (PCLKL) core clock ID for the RZ/T2H
(R9A09G077) SoC.  This clock is used by peripherals such as IIC, WDT,
and others.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250617155757.149597-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2025-06-17 16:57:55 +01:00 committed by Geert Uytterhoeven
parent 4e591b890a
commit 62ab7ac5be
1 changed files with 1 additions and 0 deletions
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include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
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@ -23,5 +23,6 @@
#define R9A09G077_CLK_PCLKGPTL 11
#define R9A09G077_CLK_PCLKH 12
#define R9A09G077_CLK_PCLKM 13
#define R9A09G077_CLK_PCLKL 14
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */