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Qualcomm Arm64 DeviceTree fixes for v6.13

Browse Source 
Revert the enablement of OTG support on primary and secondary USB Type-C
 controllers of X1 Elite, for now, as this broke support for USB hotplug.
 
 Disable the TPDM DCC device on SA8775P, as this is inaccessible per
 current firmware configuration. Also correct the PCIe "addr_space"
 region to enable larger BAR sizes.
 
 Also fix the address space of PCIe6a found in X1 Elite.
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Merge tag 'qcom-arm64-fixes-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm Arm64 DeviceTree fixes for v6.13

Revert the enablement of OTG support on primary and secondary USB Type-C
controllers of X1 Elite, for now, as this broke support for USB hotplug.

Disable the TPDM DCC device on SA8775P, as this is inaccessible per
current firmware configuration. Also correct the PCIe "addr_space"
region to enable larger BAR sizes.

Also fix the address space of PCIe6a found in X1 Elite.

* tag 'qcom-arm64-fixes-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: sa8775p: fix the secure device bootup issue
  Revert "arm64: dts: qcom: x1e80100: enable OTG on USB-C controllers"
  Revert "arm64: dts: qcom: x1e80100-crd: enable otg on usb ports"
  arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
  Revert "arm64: dts: qcom: x1e78100-t14s: enable otg on usb-c ports"
  arm64: dts: qcom: sa8775p: Fix the size of 'addr_space' regions

Link: https://lore.kernel.org/r/20250103024945.4649-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-01-09 22:54:39 +01:00
commit 627522c8bf
4 changed files with 24 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm64/boot/dts/qcom/sa8775p.dtsi
View File

@ -2440,6 +2440,7 @@ tpdm@4003000 {
qcom,cmb-element-bits = <32>;
qcom,cmb-msrs-num = <32>;
status = "disabled";
out-ports {
port {
@ -6092,7 +6093,7 @@ pcie0_ep: pcie-ep@1c00000 {
<0x0 0x40000000 0x0 0xf20>,
<0x0 0x40000f20 0x0 0xa8>,
<0x0 0x40001000 0x0 0x4000>,
<0x0 0x40200000 0x0 0x100000>,
<0x0 0x40200000 0x0 0x1fe00000>,
<0x0 0x01c03000 0x0 0x1000>,
<0x0 0x40005000 0x0 0x2000>;
reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
@ -6250,7 +6251,7 @@ pcie1_ep: pcie-ep@1c10000 {
<0x0 0x60000000 0x0 0xf20>,
<0x0 0x60000f20 0x0 0xa8>,
<0x0 0x60001000 0x0 0x4000>,
<0x0 0x60200000 0x0 0x100000>,
<0x0 0x60200000 0x0 0x1fe00000>,
<0x0 0x01c13000 0x0 0x1000>,
<0x0 0x60005000 0x0 0x2000>;
reg-names = "parf", "dbi", "elbi", "atu", "addr_space",

8
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts
View File

@ -773,6 +773,10 @@ &usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
};
&usb_1_ss0_dwc3_hs {
remote-endpoint = <&pmic_glink_ss0_hs_in>;
};
@ -801,6 +805,10 @@ &usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
};
&usb_1_ss1_dwc3_hs {
remote-endpoint = <&pmic_glink_ss1_hs_in>;
};

12
arch/arm64/boot/dts/qcom/x1e80100-crd.dts
View File

@ -1197,6 +1197,10 @@ &usb_1_ss0 {
status = "okay";
};
&usb_1_ss0_dwc3 {
dr_mode = "host";
};
&usb_1_ss0_dwc3_hs {
remote-endpoint = <&pmic_glink_ss0_hs_in>;
};
@ -1225,6 +1229,10 @@ &usb_1_ss1 {
status = "okay";
};
&usb_1_ss1_dwc3 {
dr_mode = "host";
};
&usb_1_ss1_dwc3_hs {
remote-endpoint = <&pmic_glink_ss1_hs_in>;
};
@ -1253,6 +1261,10 @@ &usb_1_ss2 {
status = "okay";
};
&usb_1_ss2_dwc3 {
dr_mode = "host";
};
&usb_1_ss2_dwc3_hs {
remote-endpoint = <&pmic_glink_ss2_hs_in>;
};

8
arch/arm64/boot/dts/qcom/x1e80100.dtsi
View File

@ -2924,7 +2924,7 @@ pcie6a: pci@1bf8000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
<0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
<0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x3d00000>;
bus-range = <0x00 0xff>;
dma-coherent;
@ -4066,8 +4066,6 @@ usb_1_ss2_dwc3: usb@a000000 {
dma-coherent;
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -4321,8 +4319,6 @@ usb_1_ss0_dwc3: usb@a600000 {
dma-coherent;
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -4421,8 +4417,6 @@ usb_1_ss1_dwc3: usb@a800000 {
dma-coherent;
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;