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drm/rockchip: dsi: Add support for RK3128

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The DesignWare MIPI DSI controller found RK3128 SoCs supports up to 4 DSI
data lanes. Similar to PX30/RK356x/RV1126 it uses an external D-PHY.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240509140653.168591-6-knaerzche@gmail.com
This commit is contained in:
Alex Bee 2024-05-09 16:06:51 +02:00 committed by Heiko Stuebner
parent 9bb3d9ad3e
commit 62545c719e
1 changed files with 20 additions and 0 deletions
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20
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
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@ -153,6 +153,11 @@
#define PX30_DSI_TURNDISABLE BIT(5)
#define PX30_DSI_LCDC_SEL BIT(0)
#define RK3128_GRF_LVDS_CON0 0x0150
#define RK3128_DSI_FORCETXSTOPMODE GENMASK(13, 10)
#define RK3128_DSI_FORCERXMODE BIT(9)
#define RK3128_DSI_TURNDISABLE BIT(8)
#define RK3288_GRF_SOC_CON6 0x025c
#define RK3288_DSI0_LCDC_SEL BIT(6)
#define RK3288_DSI1_LCDC_SEL BIT(9)
@ -1493,6 +1498,18 @@ static const struct rockchip_dw_dsi_chip_data px30_chip_data[] = {
{ /* sentinel */ }
};
static const struct rockchip_dw_dsi_chip_data rk3128_chip_data[] = {
{
.reg = 0x10110000,
.lanecfg1_grf_reg = RK3128_GRF_LVDS_CON0,
.lanecfg1 = HIWORD_UPDATE(0, RK3128_DSI_TURNDISABLE |
RK3128_DSI_FORCERXMODE |
RK3128_DSI_FORCETXSTOPMODE),
.max_data_lanes = 4,
},
{ /* sentinel */ }
};
static const struct rockchip_dw_dsi_chip_data rk3288_chip_data[] = {
{
.reg = 0xff960000,
@ -1670,6 +1687,9 @@ static const struct of_device_id dw_mipi_dsi_rockchip_dt_ids[] = {
{
.compatible = "rockchip,px30-mipi-dsi",
.data = &px30_chip_data,
}, {
.compatible = "rockchip,rk3128-mipi-dsi",
.data = &rk3128_chip_data,
}, {
.compatible = "rockchip,rk3288-mipi-dsi",
.data = &rk3288_chip_data,