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drm/i915: Fix readout of PIPEGCMAX

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PIPEGCMAX is a 11.6 (or 1.16 if you will) value. Ie. it can
represent a value of 1.0 when the maximum we can store in the
software LUT is 0.ffff. Clamp the value so that it gets
saturated to the max the uapi supports.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200303173313.28117-9-ville.syrjala@linux.intel.com
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
This commit is contained in:
Ville Syrjälä 2020-03-03 19:33:12 +02:00
parent 0ff3b23f0c
commit 62153bdd66
2 changed files with 2 additions and 2 deletions
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3
drivers/gpu/drm/i915/display/intel_color.c
View File

@ -442,7 +442,8 @@ static void i965_lut_10p6_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
static u16 i965_lut_11p6_max_pack(u32 val)
{
return REG_FIELD_GET(PIPEGCMAX_RGB_MASK, val);
/* PIPEGCMAX is 11.6, clamp to 10.6 */
return clamp_val(val, 0, 0xffff);
}
static u32 ilk_lut_10(const struct drm_color_lut *color)

1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -5870,7 +5870,6 @@ enum {
#define _PIPEAGCMAX 0x70010
#define _PIPEBGCMAX 0x71010
#define PIPEGCMAX_RGB_MASK REG_GENMASK(15, 0)
#define PIPEGCMAX(pipe, i) _MMIO_PIPE2(pipe, _PIPEAGCMAX + (i) * 4)
#define _PIPE_MISC_A 0x70030