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drm/amd/pm: fix smu v13 soft clock frequency setting issue
v1: resolve the issue where some freq frequencies cannot be set correctly due to insufficient floating-point precision. v2: patch this convert on 'max' value only. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -55,6 +55,7 @@
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#define SMUQ10_TO_UINT(x) ((x) >> 10)
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#define SMUQ10_FRAC(x) ((x) & 0x3ff)
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#define SMUQ10_ROUND(x) ((SMUQ10_TO_UINT(x)) + ((SMUQ10_FRAC(x)) >= 0x200))
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#define SMU_V13_SOFT_FREQ_ROUND(x) ((x) + 1)
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extern const int pmfw_decoded_link_speed[5];
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extern const int pmfw_decoded_link_width[7];
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@ -1554,6 +1554,7 @@ int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu,
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return clk_id;
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if (max > 0) {
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max = SMU_V13_SOFT_FREQ_ROUND(max);
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if (automatic)
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param = (uint32_t)((clk_id << 16) | 0xffff);
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else
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