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ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings

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Align the order of two MFC clocks with Exynos4 DTS and MFC bindings

Link: https://lore.kernel.org/r/20230328114729.61436-1-aakarsh.jain@samsung.com
Link: https://lore.kernel.org/r/20230421095721.31857-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski 2023-04-21 11:57:20 +02:00
parent 64f92c24aa
commit 6175f658ae
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/s5pv210.dtsi
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@ -452,8 +452,8 @@ mfc: codec@f1700000 {
reg = <0xf1700000 0x10000>;
interrupt-parent = <&vic2>;
interrupts = <14>;
clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
clock-names = "sclk_mfc", "mfc";
clocks = <&clocks CLK_MFC>, <&clocks DOUT_MFC>;
clock-names = "mfc", "sclk_mfc";
};
vic0: interrupt-controller@f2000000 {