PCI: imx6: Assert PERST# before enabling regulators

The PCIe endpoint may start responding or driving signals as soon as its
supply is enabled, even before the reference clock is stable.  Asserting
PERST# before enabling the regulator ensures that the endpoint remains in
reset throughout the entire power-up sequence, until both power and refclk
are known to be stable and link initialization can safely begin.

Currently, the driver enables the vpcie3v3aux regulator in imx_pcie_probe()
before PERST# is asserted in imx_pcie_host_init(), which may cause PCIe
endpoint undefined behavior during early power-up. However, there is no
issue so far because PERST# is requested as GPIOD_OUT_HIGH in
imx_pcie_probe(), which guarantees that PERST# is asserted before enabling
the vpcie3v3aux regulator.

This prepares for an upcoming changes that will parse the reset property
using the new Root Port binding, which will use GPIOD_ASIS when requesting
the reset GPIO. With GPIOD_ASIS, the GPIO state is not guaranteed, so
explicit sequencing is required.

Fix the power sequencing by:

  1. Moving vpcie3v3aux regulator enable from probe to
     imx_pcie_host_init(), where it can be properly sequenced with PERST#.

  2. Moving imx_pcie_assert_perst() before regulator and clock enable to
     ensure correct ordering.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://patch.msgid.link/20260422093549.407022-4-sherry.sun@nxp.com
This commit is contained in:
Sherry Sun 2026-04-22 17:35:40 +08:00 committed by Bjorn Helgaas
parent b269bb5e4c
commit 610fa91d98

View File

@ -168,6 +168,8 @@ struct imx_pcie {
u32 tx_swing_full; u32 tx_swing_full;
u32 tx_swing_low; u32 tx_swing_low;
struct regulator *vpcie; struct regulator *vpcie;
struct regulator *vpcie_aux;
bool vpcie_aux_enabled;
struct regulator *vph; struct regulator *vph;
void __iomem *phy_base; void __iomem *phy_base;
@ -1217,6 +1219,13 @@ static void imx_pcie_disable_device(struct pci_host_bridge *bridge,
imx_pcie_remove_lut(imx_pcie, pci_dev_id(pdev)); imx_pcie_remove_lut(imx_pcie, pci_dev_id(pdev));
} }
static void imx_pcie_vpcie_aux_disable(void *data)
{
struct regulator *vpcie_aux = data;
regulator_disable(vpcie_aux);
}
static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert) static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert)
{ {
if (assert) { if (assert) {
@ -1237,6 +1246,24 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
struct imx_pcie *imx_pcie = to_imx_pcie(pci); struct imx_pcie *imx_pcie = to_imx_pcie(pci);
int ret; int ret;
imx_pcie_assert_perst(imx_pcie, true);
/* Keep 3.3Vaux supply enabled for entire PCIe controller lifecycle */
if (imx_pcie->vpcie_aux && !imx_pcie->vpcie_aux_enabled) {
ret = regulator_enable(imx_pcie->vpcie_aux);
if (ret) {
dev_err(dev, "failed to enable vpcie_aux regulator: %d\n",
ret);
return ret;
}
imx_pcie->vpcie_aux_enabled = true;
ret = devm_add_action_or_reset(dev, imx_pcie_vpcie_aux_disable,
imx_pcie->vpcie_aux);
if (ret)
return ret;
}
if (imx_pcie->vpcie) { if (imx_pcie->vpcie) {
ret = regulator_enable(imx_pcie->vpcie); ret = regulator_enable(imx_pcie->vpcie);
if (ret) { if (ret) {
@ -1246,25 +1273,24 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
} }
} }
ret = imx_pcie_clk_enable(imx_pcie);
if (ret) {
dev_err(dev, "unable to enable pcie clocks: %d\n", ret);
goto err_reg_disable;
}
if (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) { if (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) {
pp->bridge->enable_device = imx_pcie_enable_device; pp->bridge->enable_device = imx_pcie_enable_device;
pp->bridge->disable_device = imx_pcie_disable_device; pp->bridge->disable_device = imx_pcie_disable_device;
} }
imx_pcie_assert_core_reset(imx_pcie); imx_pcie_assert_core_reset(imx_pcie);
imx_pcie_assert_perst(imx_pcie, true);
if (imx_pcie->drvdata->init_phy) if (imx_pcie->drvdata->init_phy)
imx_pcie->drvdata->init_phy(imx_pcie); imx_pcie->drvdata->init_phy(imx_pcie);
imx_pcie_configure_type(imx_pcie); imx_pcie_configure_type(imx_pcie);
ret = imx_pcie_clk_enable(imx_pcie);
if (ret) {
dev_err(dev, "unable to enable pcie clocks: %d\n", ret);
goto err_reg_disable;
}
if (imx_pcie->phy) { if (imx_pcie->phy) {
ret = phy_init(imx_pcie->phy); ret = phy_init(imx_pcie->phy);
if (ret) { if (ret) {
@ -1777,9 +1803,13 @@ static int imx_pcie_probe(struct platform_device *pdev)
of_property_read_u32(node, "fsl,max-link-speed", &pci->max_link_speed); of_property_read_u32(node, "fsl,max-link-speed", &pci->max_link_speed);
imx_pcie->supports_clkreq = of_property_read_bool(node, "supports-clkreq"); imx_pcie->supports_clkreq = of_property_read_bool(node, "supports-clkreq");
ret = devm_regulator_get_enable_optional(&pdev->dev, "vpcie3v3aux"); imx_pcie->vpcie_aux = devm_regulator_get_optional(&pdev->dev,
if (ret < 0 && ret != -ENODEV) "vpcie3v3aux");
return dev_err_probe(dev, ret, "failed to enable Vaux supply\n"); if (IS_ERR(imx_pcie->vpcie_aux)) {
if (PTR_ERR(imx_pcie->vpcie_aux) != -ENODEV)
return PTR_ERR(imx_pcie->vpcie_aux);
imx_pcie->vpcie_aux = NULL;
}
imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie");
if (IS_ERR(imx_pcie->vpcie)) { if (IS_ERR(imx_pcie->vpcie)) {