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arm_mpam: propagate MSC access errors for mpam_reprogram_ris_partid()
Allow the mpam_reprogram_ris_partid() function to check for and return errors, and propagate MSC read and write errors from the lower level up. This also covers the callers of this function: mpam_reset_ris() and apply_config(). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ben Horgan <ben.horgan@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Tested-by: Gavin Shan <gshan@redhat.com> # on NVIDIA Grace Hopper Reviewed-by: Srivathsa L Rao <srivathsa.rao@oss.qualcomm.com> [morse: Fixed merge conflicts in mpam_save_mbwu_state() and __ris_msmon_read()] Signed-off-by: James Morse <james.morse@arm.com>
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a3a94c13c4
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60e33a1864
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@ -1616,7 +1616,7 @@ void mpam_msmon_reset_mbwu(struct mpam_component *comp, struct mon_cfg *ctx)
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}
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}
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static void mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd)
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static int mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd)
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{
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u32 num_words, msb;
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u32 bm = ~0;
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@ -1625,15 +1625,20 @@ static void mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd)
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lockdep_assert_held(&msc->part_sel_lock);
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if (wd == 0)
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return;
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return 0;
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/*
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* Write all ~0 to all but the last 32bit-word, which may
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* have fewer bits...
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*/
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num_words = DIV_ROUND_UP(wd, 32);
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for (i = 0; i < num_words - 1; i++, reg += sizeof(bm))
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__mpam_write_reg(msc, reg, bm);
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for (i = 0; i < num_words - 1; i++, reg += sizeof(bm)) {
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int ret;
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ret = __mpam_write_reg(msc, reg, bm);
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if (ret)
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return ret;
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}
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/*
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* ....and then the last (maybe) partial 32bit word. When wd is a
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@ -1641,7 +1646,7 @@ static void mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd)
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*/
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msb = (wd - 1) % 32;
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bm = GENMASK(msb, 0);
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__mpam_write_reg(msc, reg, bm);
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return __mpam_write_reg(msc, reg, bm);
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}
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static void mpam_apply_t241_erratum(struct mpam_msc_ris *ris, u16 partid)
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@ -1714,40 +1719,59 @@ static u16 mpam_wa_t241_calc_min_from_max(struct mpam_props *props,
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}
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/* Called via IPI. Call while holding an SRCU reference */
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static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
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struct mpam_config *cfg)
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static int mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
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struct mpam_config *cfg)
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{
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u16 cmax = MPAMCFG_CMAX_CMAX;
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struct mpam_msc *msc = ris->vmsc->msc;
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struct mpam_props *rprops = &ris->props;
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int ret;
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mutex_lock(&msc->part_sel_lock);
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__mpam_part_sel(ris->ris_idx, partid, msc);
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guard(mutex)(&msc->part_sel_lock);
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ret = __mpam_part_sel(ris->ris_idx, partid, msc);
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if (ret)
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return ret;
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if (mpam_has_feature(mpam_feat_partid_nrw, rprops)) {
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/* Update the intpartid mapping */
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mpam_write_partsel_reg(msc, INTPARTID,
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MPAMCFG_INTPARTID_INTERNAL | partid);
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ret = mpam_write_partsel_reg(msc, INTPARTID,
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MPAMCFG_INTPARTID_INTERNAL | partid);
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if (ret)
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return ret;
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/*
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* Then switch to the 'internal' partid to update the
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* configuration.
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*/
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__mpam_intpart_sel(ris->ris_idx, partid, msc);
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ret = __mpam_intpart_sel(ris->ris_idx, partid, msc);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_cpor_part, rprops)) {
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if (mpam_has_feature(mpam_feat_cpor_part, cfg))
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mpam_write_partsel_reg(msc, CPBM, cfg->cpbm);
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else
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mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM, rprops->cpbm_wd);
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if (mpam_has_feature(mpam_feat_cpor_part, cfg)) {
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ret = mpam_write_partsel_reg(msc, CPBM, cfg->cpbm);
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if (ret)
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return ret;
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} else {
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ret = mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM,
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rprops->cpbm_wd);
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if (ret)
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return ret;
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}
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}
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if (mpam_has_feature(mpam_feat_mbw_part, rprops)) {
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if (mpam_has_feature(mpam_feat_mbw_part, cfg))
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mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm);
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else
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mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits);
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if (mpam_has_feature(mpam_feat_mbw_part, cfg)) {
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ret = mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm);
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if (ret)
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return ret;
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} else {
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ret = mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM,
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rprops->mbw_pbm_bits);
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if (ret)
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return ret;
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}
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}
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if (mpam_has_feature(mpam_feat_mbw_min, rprops)) {
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@ -1760,27 +1784,47 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
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val = max(val, min);
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}
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mpam_write_partsel_reg(msc, MBW_MIN, val);
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ret = mpam_write_partsel_reg(msc, MBW_MIN, val);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_mbw_max, rprops)) {
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if (mpam_has_feature(mpam_feat_mbw_max, cfg))
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mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max);
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else
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mpam_write_partsel_reg(msc, MBW_MAX, MPAMCFG_MBW_MAX_MAX);
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if (mpam_has_feature(mpam_feat_mbw_max, cfg)) {
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ret = mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max);
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if (ret)
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return ret;
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} else {
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ret = mpam_write_partsel_reg(msc, MBW_MAX,
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MPAMCFG_MBW_MAX_MAX);
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if (ret)
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return ret;
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}
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}
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if (mpam_has_feature(mpam_feat_mbw_prop, rprops))
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mpam_write_partsel_reg(msc, MBW_PROP, 0);
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if (mpam_has_feature(mpam_feat_mbw_prop, rprops)) {
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ret = mpam_write_partsel_reg(msc, MBW_PROP, 0);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_cmax_cmax, rprops))
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mpam_write_partsel_reg(msc, CMAX, cmax);
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if (mpam_has_feature(mpam_feat_cmax_cmax, rprops)) {
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ret = mpam_write_partsel_reg(msc, CMAX, cmax);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_cmax_cmin, rprops))
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mpam_write_partsel_reg(msc, CMIN, 0);
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if (mpam_has_feature(mpam_feat_cmax_cmin, rprops)) {
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ret = mpam_write_partsel_reg(msc, CMIN, 0);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_cmax_cassoc, rprops))
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mpam_write_partsel_reg(msc, CASSOC, MPAMCFG_CASSOC_CASSOC);
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if (mpam_has_feature(mpam_feat_cmax_cassoc, rprops)) {
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ret = mpam_write_partsel_reg(msc, CASSOC, MPAMCFG_CASSOC_CASSOC);
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if (ret)
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return ret;
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}
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if (mpam_has_feature(mpam_feat_intpri_part, rprops) ||
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mpam_has_feature(mpam_feat_dspri_part, rprops)) {
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@ -1804,12 +1848,14 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
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pri_val |= FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri);
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}
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mpam_write_partsel_reg(msc, PRI, pri_val);
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ret = mpam_write_partsel_reg(msc, PRI, pri_val);
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if (ret)
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return ret;
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}
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mpam_quirk_post_config_change(ris, partid, cfg);
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mutex_unlock(&msc->part_sel_lock);
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return 0;
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}
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/* Call with msc cfg_lock held */
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@ -1936,6 +1982,7 @@ static int mpam_reset_ris(void *arg)
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u16 partid_max;
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struct mpam_config reset_cfg = {};
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struct mpam_msc_ris *ris = arg;
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int ret;
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if (ris->in_reset_state)
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return 0;
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@ -1943,8 +1990,11 @@ static int mpam_reset_ris(void *arg)
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spin_lock(&partid_max_lock);
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partid_max = mpam_partid_max;
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spin_unlock(&partid_max_lock);
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for (u32 partid = 0; partid <= partid_max; partid++)
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mpam_reprogram_ris_partid(ris, partid, &reset_cfg);
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for (u32 partid = 0; partid <= partid_max; partid++) {
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ret = mpam_reprogram_ris_partid(ris, partid, &reset_cfg);
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -1983,9 +2033,8 @@ static int __write_config(void *arg)
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{
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struct mpam_write_config_arg *c = arg;
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mpam_reprogram_ris_partid(c->ris, c->partid, &c->comp->cfg[c->partid]);
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return 0;
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return mpam_reprogram_ris_partid(c->ris, c->partid,
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&c->comp->cfg[c->partid]);
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}
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static void mpam_reprogram_msc(struct mpam_msc *msc)
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@ -3144,6 +3193,7 @@ int mpam_apply_config(struct mpam_component *comp, u16 partid,
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struct mpam_msc_ris *ris;
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struct mpam_vmsc *vmsc;
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struct mpam_msc *msc;
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int ret;
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lockdep_assert_cpus_held();
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@ -3161,14 +3211,15 @@ int mpam_apply_config(struct mpam_component *comp, u16 partid,
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srcu_read_lock_held(&mpam_srcu)) {
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msc = vmsc->msc;
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mutex_lock(&msc->cfg_lock);
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guard(mutex)(&msc->cfg_lock);
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list_for_each_entry_srcu(ris, &vmsc->ris, vmsc_list,
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srcu_read_lock_held(&mpam_srcu)) {
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arg.ris = ris;
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mpam_touch_msc(msc, __write_config, &arg);
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ret = mpam_touch_msc(msc, __write_config, &arg);
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if (ret)
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return ret;
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ris->in_reset_state = false;
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}
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mutex_unlock(&msc->cfg_lock);
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}
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return 0;
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