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drm/amd/display: Merge pipes for validate

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Validation expects to operate on non-split pipes. This is
seen in dcn20_fast_validate_bw, which merges pipes for
validation. We weren't doing that in the non-fast path
which lead to validation failures when operating with
4-to-1 MPC and a writeback connector.

Co-developed by Claude Sonnet 4.5

Assisted-by: Claude:claude-sonnet-4.5
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2026-01-16 11:48:11 -05:00 committed by Alex Deucher
parent c34cb0d824
commit 606f6b1713
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
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@ -1641,6 +1641,8 @@ noinline bool dcn30_internal_validate_bw(
if (!pipes)
return false;
dcn20_merge_pipes_for_validate(dc, context);
context->bw_ctx.dml.vba.maxMpcComb = 0;
context->bw_ctx.dml.vba.VoltageLevel = 0;
context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;