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drm/i915/dsi: Fix overflow issue in pclk parsing
Parsed divider p will overflow and is considered being valid in case pll_ctl == 0. Fix this by checking divider p before decreasing it. Also small improvement is made by using fls() instead of custom loop. v2: use fls() and check parsed divider Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250807042635.2491537-1-jouni.hogander@intel.com
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@ -142,11 +142,9 @@ static int vlv_dsi_pclk(struct intel_encoder *encoder,
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pll_div &= DSI_PLL_M1_DIV_MASK;
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pll_div = pll_div >> DSI_PLL_M1_DIV_SHIFT;
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while (pll_ctl) {
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pll_ctl = pll_ctl >> 1;
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p++;
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}
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p--;
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p = fls(pll_ctl);
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if (p)
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p--;
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if (!p) {
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drm_err(display->drm, "wrong P1 divisor\n");
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