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drm/amd/display: Enable HDMI FRL by default

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FRL (Fixed Rate Link) is required to drive HDMI 2.1 high-bandwidth
modes and is broadly supported on capable sinks, but it was left
disabled unless a user explicitly opted in via the
amdgpu.dcfeaturemask module parameter.

Enable it by default by adding DC_FRL_MASK to the default
amdgpu_dc_feature_mask value, keeping the mask semantics unchanged.

Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Fangzhi Zuo 2026-08-27 10:55:43 -04:00 committed by Alex Deucher
parent 770e3dd8e2
commit 5fd3b60d9b
2 changed files with 3 additions and 2 deletions
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3
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
View File

@ -218,8 +218,9 @@ int amdgpu_smu_pptable_id = -1;
* DISABLE_FRACTIONAL_PWM (bit 2) disabled by default
* PSR (bit 3) disabled by default
* EDP NO POWER SEQUENCING (bit 4) disabled by default
* FRL (bit 10) enabled by default
*/
uint amdgpu_dc_feature_mask = 2;
uint amdgpu_dc_feature_mask = DC_MULTI_MON_PP_MCLK_SWITCH_MASK | DC_FRL_MASK;
uint amdgpu_dc_debug_mask;
uint amdgpu_dc_visual_confirm;
int amdgpu_async_gfx_ring = 1;

2
drivers/gpu/drm/amd/include/amd_shared.h
View File

@ -287,7 +287,7 @@ enum DC_FEATURE_MASK {
*/
DC_REPLAY_MASK = (1 << 9),
/**
* @DC_FRL_MASK: (0x400) disabled by default
* @DC_FRL_MASK: (0x400) enabled by default
*/
DC_FRL_MASK = (1 << 10),
};