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drm/i915: compute pipe bpp from link bandwidth management

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Since intel_fdi_compute_pipe_bpp() is no longer FDI-specific and
now applies to all connectors. Move it to intel_link_bw.c,
and rename to intel_link_bw_compute_pipe_bpp().

v2: Remove unused header file.

Cc: Shankar Uma <uma.shankar@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
[Imre: Remove unused intel_fdi.h include from intel_hdmi.c]
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250901055721.219995-3-shawn.c.lee@intel.com
This commit is contained in:
Lee Shawn C 2025-09-01 05:57:21 +00:00 committed by Imre Deak
parent 51bfda2e76
commit 5f9bab8081
8 changed files with 38 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/drm/i915/display/intel_crt.c
View File

@ -50,6 +50,7 @@
#include "intel_gmbus.h"
#include "intel_hotplug.h"
#include "intel_hotplug_irq.h"
#include "intel_link_bw.h"
#include "intel_load_detect.h"
#include "intel_pch_display.h"
#include "intel_pch_refclk.h"
@ -421,7 +422,7 @@ static int pch_crt_compute_config(struct intel_encoder *encoder,
return -EINVAL;
crtc_state->has_pch_encoder = true;
if (!intel_fdi_compute_pipe_bpp(crtc_state))
if (!intel_link_bw_compute_pipe_bpp(crtc_state))
return -EINVAL;
crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
@ -446,7 +447,7 @@ static int hsw_crt_compute_config(struct intel_encoder *encoder,
return -EINVAL;
crtc_state->has_pch_encoder = true;
if (!intel_fdi_compute_pipe_bpp(crtc_state))
if (!intel_link_bw_compute_pipe_bpp(crtc_state))
return -EINVAL;
crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;

28
drivers/gpu/drm/i915/display/intel_fdi.c
View File

@ -292,34 +292,6 @@ int intel_fdi_link_freq(struct intel_display *display,
return display->fdi.pll_freq;
}
/**
* intel_fdi_compute_pipe_bpp - compute pipe bpp limited by max link bpp
* @crtc_state: the crtc state
*
* Compute the pipe bpp limited by the CRTC's maximum link bpp. Encoders can
* call this function during state computation in the simple case where the
* link bpp will always match the pipe bpp. This is the case for all non-DP
* encoders, while DP encoders will use a link bpp lower than pipe bpp in case
* of DSC compression.
*
* Returns %true in case of success, %false if pipe bpp would need to be
* reduced below its valid range.
*/
bool intel_fdi_compute_pipe_bpp(struct intel_crtc_state *crtc_state)
{
int pipe_bpp = min(crtc_state->pipe_bpp,
fxp_q4_to_int(crtc_state->max_link_bpp_x16));
pipe_bpp = rounddown(pipe_bpp, 2 * 3);
if (pipe_bpp < 6 * 3)
return false;
crtc_state->pipe_bpp = pipe_bpp;
return true;
}
int ilk_fdi_compute_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{

1
drivers/gpu/drm/i915/display/intel_fdi.h
View File

@ -20,7 +20,6 @@ struct intel_link_bw_limits;
int intel_fdi_add_affected_crtcs(struct intel_atomic_state *state);
int intel_fdi_link_freq(struct intel_display *display,
const struct intel_crtc_state *pipe_config);
bool intel_fdi_compute_pipe_bpp(struct intel_crtc_state *crtc_state);
int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
struct intel_crtc_state *pipe_config);
int intel_fdi_atomic_check_link(struct intel_atomic_state *state,

4
drivers/gpu/drm/i915/display/intel_hdmi.c
View File

@ -55,12 +55,12 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_dp.h"
#include "intel_fdi.h"
#include "intel_gmbus.h"
#include "intel_hdcp.h"
#include "intel_hdcp_regs.h"
#include "intel_hdcp_shim.h"
#include "intel_hdmi.h"
#include "intel_link_bw.h"
#include "intel_lspcon.h"
#include "intel_panel.h"
#include "intel_pfit.h"
@ -2346,7 +2346,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
pipe_config->pixel_multiplier = 2;
if (!intel_fdi_compute_pipe_bpp(pipe_config))
if (!intel_link_bw_compute_pipe_bpp(pipe_config))
return -EINVAL;
pipe_config->has_audio =

28
drivers/gpu/drm/i915/display/intel_link_bw.c
View File

@ -164,6 +164,34 @@ int intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
return ret;
}
/**
* intel_link_bw_compute_pipe_bpp - compute pipe bpp limited by max link bpp
* @crtc_state: the crtc state
*
* Compute the pipe bpp limited by the CRTC's maximum link bpp. Encoders can
* call this function during state computation in the simple case where the
* link bpp will always match the pipe bpp. This is the case for all non-DP
* encoders, while DP encoders will use a link bpp lower than pipe bpp in case
* of DSC compression.
*
* Returns %true in case of success, %false if pipe bpp would need to be
* reduced below its valid range.
*/
bool intel_link_bw_compute_pipe_bpp(struct intel_crtc_state *crtc_state)
{
int pipe_bpp = min(crtc_state->pipe_bpp,
fxp_q4_to_int(crtc_state->max_link_bpp_x16));
pipe_bpp = rounddown(pipe_bpp, 2 * 3);
if (pipe_bpp < 6 * 3)
return false;
crtc_state->pipe_bpp = pipe_bpp;
return true;
}
/**
* intel_link_bw_set_bpp_limit_for_pipe - set link bpp limit for a pipe to its minimum
* @state: atomic state

1
drivers/gpu/drm/i915/display/intel_link_bw.h
View File

@ -27,6 +27,7 @@ int intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
struct intel_link_bw_limits *limits,
u8 pipe_mask,
const char *reason);
bool intel_link_bw_compute_pipe_bpp(struct intel_crtc_state *crtc_state);
bool intel_link_bw_set_bpp_limit_for_pipe(struct intel_atomic_state *state,
const struct intel_link_bw_limits *old_limits,
struct intel_link_bw_limits *new_limits,

3
drivers/gpu/drm/i915/display/intel_lvds.c
View File

@ -48,6 +48,7 @@
#include "intel_dpll.h"
#include "intel_fdi.h"
#include "intel_gmbus.h"
#include "intel_link_bw.h"
#include "intel_lvds.h"
#include "intel_lvds_regs.h"
#include "intel_panel.h"
@ -433,7 +434,7 @@ static int intel_lvds_compute_config(struct intel_encoder *encoder,
if (HAS_PCH_SPLIT(display)) {
crtc_state->has_pch_encoder = true;
if (!intel_fdi_compute_pipe_bpp(crtc_state))
if (!intel_link_bw_compute_pipe_bpp(crtc_state))
return -EINVAL;
}

4
drivers/gpu/drm/i915/display/intel_sdvo.c
View File

@ -47,11 +47,11 @@
#include "intel_display_driver.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_fdi.h"
#include "intel_fifo_underrun.h"
#include "intel_gmbus.h"
#include "intel_hdmi.h"
#include "intel_hotplug.h"
#include "intel_link_bw.h"
#include "intel_panel.h"
#include "intel_sdvo.h"
#include "intel_sdvo_regs.h"
@ -1367,7 +1367,7 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
if (HAS_PCH_SPLIT(display)) {
pipe_config->has_pch_encoder = true;
if (!intel_fdi_compute_pipe_bpp(pipe_config))
if (!intel_link_bw_compute_pipe_bpp(pipe_config))
return -EINVAL;
}